Micromodules including integrated thin film inductors
View Patent ↗Micromodules and methods of making them are disclosed. An exemplary micromodule includes a substrate having a thin film inductor, and a bumped die mounted on the substrate and over the thin film inductor.
1. A micromodule comprising:
a component substrate comprising a thin film inductor, the thin film inductor comprising a coiled electrical trace and a layer of magnetic material disposed adjacent to at least a portion of the coiled electrical trace, wherein the magnetic permeability of the magnetic material is more than ten times greater than that of free space; and
a bumped semiconductor die disposed on the component substrate and over the thin film inductor.
2. The micromodule of claim 1 , wherein the bumped die is disposed on a first area of the component substrate, and wherein the micromodule further comprises a plurality of interconnect pads disposed on the component substrate and around the first area.
3. The micromodule of claim 1 , wherein the component substrate comprises silicon.
4. The micromodule of claim 1 , wherein the semiconductor die comprises a controller die that controls the flow of current through the inductor.
5. The micromodule of claim 1 , wherein the bumped die comprises a conductive region that is coupled to a terminal of the thin film inductor by a conductive interconnect bump.
6. The micromodule of claim 1 , wherein the thin film inductor is disposed at the first surface of the component substrate, wherein the bumped semiconductor die is mounted at the first surface of the component substrate, and wherein the component substrate further comprises at least one capacitor that has at least one terminal disposed on at least a portion of the second surface of the component substrate.
7. The micromodule of claim 6 , wherein the component substrate further comprises a doped semiconductor substrate, wherein the at least one capacitor comprises at least one trench capacitor formed in the second surface of the component substrate.
8. The micromodule of claim 6 , wherein the component substrate further comprises a via disposed between its first and second surfaces, and wherein at least one terminal of the at least one capacitor is electrically coupled to the via.
9. The micromodule of claim 1 , wherein the component substrate comprises:
a first surface having a first area;
a first plurality of interconnect pads disposed in the first area and to which the bumped die is attached;
a second plurality of interconnect pads disposed on the first surface of component substrate and around the first area; and
at least one electrically trace electrically coupling a pad of the first plurality of interconnect pads to a pad of the second plurality of interconnect pads.
10. An electrical assembly comprising a system substrate, and the micromodule of claim 2 mounted to the system substrate, wherein the bumped semiconductor die is disposed between the component substrate and the system substrate.
11. The electrical assembly of claim 10 , wherein a surface of the bumped semiconductor die is electrically coupled to a conductive pad of the system substrate.
12. A micromodule comprising:
a component substrate comprising a first surface, a second surface, a thin film inductor, and a plurality of vias extending between the first and second surfaces, the thin film inductor comprising a coiled electrical trace and a layer of magnetic material disposed adjacent to at least a portion of the coiled electrical trace, wherein the magnetic permeability of the magnetic material is more than ten times greater than that of free space;
a first plurality of interconnect pads disposed on the first surface of component substrate, at least two of the first plurality of interconnect pads being electrically coupled to respective vias;
a second plurality of interconnect pads disposed on the second surface of component substrate, at least two of the second plurality of interconnect pads being electrically coupled to respective vias; and
a semiconductor die disposed over the first surface of the component substrate and electrical coupled to the first plurality of interconnect pads.
13. The micromodule of claim 12 , wherein the inductor is disposed at the second surface of the component substrate.
14. The micromodule of claim 12 , wherein the component substrate comprises silicon.
15. The micromodule of claim 12 , wherein the semiconductor die comprises a controller die that controls the flow of current through the inductor.
16. The micromodule of claim 12 , wherein the semiconductor die comprises a conductive region that is coupled to a terminal of the thin film inductor.
17. The micromodule of claim 12 , wherein the thin film inductor is disposed at the second surface of the component substrate, and wherein the component substrate further comprises a capacitor that has a terminal disposed on at least a portion of the first surface of the component substrate.
18. The micromodule of claim 17 , wherein the component substrate comprises further a doped semiconductor substrate, wherein the capacitor comprises at least one trench capacitor formed in the first surface of the component substrate.
19. The micromodule of claim 17 , wherein the terminal of the capacitor faces the semiconductor die and is electrically coupled to the semiconductor die.
20. An electrical assembly comprising a system substrate, and the micromodule of claim 12 mounted to the system substrate, wherein the component substrate is disposed between the semiconductor die and the system substrate.