IP Library Granted Patent US 8,067,767
Granted Patent B2
US 8,067,767 · App. 12/393,521 · Granted Nov 29, 2011

Display substrate having vertical thin film transistor having a channel including an oxide semiconductor pattern

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Quick Facts
Patent No.
US 8,067,767
App. No.
12/393,521
Granted
Nov 29, 2011
Kind
B2
Abstract

A display substrate according to the present invention comprises a gate line formed on a substrate, a data line, a thin film transistor connected to the gate line and the data line respectively and pixel electrode connected to the thin film transistor, wherein a channel of the thin film transistor is formed in a direction perpendicular to the substrate and, a layer where the channel is formed includes an oxide semiconductor pattern. ON current of thin film transistor of the display substrate can be increased without loss of aperture ratio.

Claims (24)

1. A display substrate comprising a gate line formed on a substrate, a data line, a thin film transistor connected to the gate line and the data line respectively and pixel electrode connected to the thin film transistor, wherein

a channel of the thin film transistor is formed in a direction perpendicular to the substrate and,

a layer where the channel is formed includes an oxide semiconductor pattern,

wherein, a recess portion is formed on the data line and a gate electrode of the thin film transistor is formed on the recess portion.

2. A display substrate comprising:

a substrate;

a source electrode, an oxide semiconductor pattern and a drain electrode sequentially formed in a direction perpendicular to the substrate;

a gate electrode formed adjacent to the source electrode, the oxide semi conductor pattern and the drain electrode with an insulating layer being therebetween; and

a pixel electrode connected to the drain electrode,

wherein a recess portion is formed on a data signal line and the gate electrode is formed on the recess portion with the insulating layer being therebetween.

3. A display substrate comprising:

a substrate;

a data signal line extended in a first direction on the substrate;

a gate signal line extended in a second direction crossing the first direction and insulated from the data signal line;

a thin film transistor connected to the data signal line and the gate signal line; and

a pixel electrode connected to the thin film transistor,

wherein the thin film transistor comprises:

a source electrode connected to the data signal line;

an oxide semiconductor pattern formed on the source electrode;

a drain electrode formed on the oxide semiconductor pattern; and

a gate electrode connected to the gate signal line and formed adjacent to the source electrode, the oxide semiconductor pattern and the drain electrode with an insulating layer being therebetween,

wherein a recess portion is formed on the data signal line and the gate electrode is formed on the recess portion.

4. The display substrate as described in claim 3 , wherein the oxide semiconductor pattern comprises at least one of Ga, Zn, In and Sn, and O.

5. The display substrate as described in claim 4 , wherein the insulating layer is formed between the data signal line and the gate electrode.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 27, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029093/0177 →