Storage medium and semiconductor package

1. A storage medium comprising:

a semiconductor package having a semiconductor chip, a resin encapsulation that encapsulates the semiconductor chip, and a plurality of electrodes arrayed on a bottom surface of the resin encapsulation; and

a substrate including a conductor that joins the electrodes, and having the semiconductor package mounted thereon, wherein

the electrodes include a plurality of signal electrodes formed within a central region of the array, and a plurality of dummy electrodes formed in an outer region of the signal electrodes,

each of the signal electrodes includes a first pad as a projection-electrode forming pad for a power supply line or a signal line, and a first projection electrode formed on the first pad, and

each of the dummy electrodes includes a second pad as a projection-electrode forming pad for a dummy electrode and a second projection electrode formed on the second pad.

2. The storage medium according to claim 1 , wherein only the dummy electrodes among the signal electrodes and the dummy electrodes are disposed in the outer region.

3. The storage medium according to claim 1 , wherein the dummy electrode further includes a third pad for burying a vacant region, and no projection electrode is formed on the third pad.

4. The storage medium according to claim 1 , wherein the central region in which the signal electrodes are formed has a region of a width about ⅓ to ½ of entire width of the array.

5. The storage medium according to claim 1 , wherein a proportion in number of the signal electrodes to the electrodes is less than 30%.

6. The storage medium according to claim 1 , wherein a proportion in number of the signal electrodes to the electrodes is less than 20%.

7. The storage medium according to claim 1 , wherein the signal electrodes are placed to exhibit line symmetry about a center line of the array formed by the electrodes or point symmetry about a center of the array.

8. The storage medium according to claim 1 , wherein the dummy electrodes are formed to enclose entire circumference of the signal electrodes.

9. The storage medium according to claim 1 , wherein semiconductor chips are stacked and encapsulated in the resin encapsulation.

10. The storage medium according to claim 1 , wherein the semiconductor chip has a NAND flash memory incorporated therein.

11. A semiconductor package comprising:

a semiconductor chip;

a wiring substrate having the semiconductor chip mounted on a first surface; and

a plurality of projection electrodes formed on a second surface opposite to the first surface of the wiring substrate, wherein

a bonding pad, to which a bonding wire extending from the semiconductor chip is connected, is formed at an edge of the first surface on the wiring substrate, and a plurality of projection-electrode forming pads for forming the projection electrodes are arrayed and formed in a lattice on the second surface, and

the projection-electrode forming pads include first projection-electrode forming pads as projection-electrode forming pads for a power supply line formed within a central region of the array and second projection-electrode forming pads as projection-electrode forming pads for a dummy electrode formed in an outer region of the central region,

the projection electrodes include first projection electrodes formed on the first projection-electrode forming pads and second projection electrodes formed on the second projection-electrode forming pads,

two or more second projection-electrode forming pads among the second projection-electrode forming pads are connected to one another by a connection pattern formed on the second surface, and

the first projection-electrode forming pads are connected to the bonding pad through the plurality of second projection-electrode forming pads connected by the connection pattern, and a through hole formed in the wiring substrate.

12. The semiconductor package according to claim 11 , wherein in the second projection-electrode forming pads connected by the connection pattern, the second projection-electrode forming pads adjacent to each other are connected.

13. The semiconductor package according to claim 11 , wherein only the second projection-electrode forming pads are disposed in the outer region.

14. The semiconductor package according to claim 11 , wherein the wiring substrate forms a rectangle, and the bonding pad is arranged at an edge on a short side of the wiring substrate.

15. The semiconductor package according to claim 11 , wherein the semiconductor chips are stacked and mounted on the wiring substrate.