Key recovery mechanism for cryptographic systems
View Patent ↗A cryptographic system can include a register containing a key and a processor coupled to the register. The processor can be operable for performing a first encrypting operation, where the encrypting operation includes computing a key schedule using the register as a workspace. At the end of the first encrypting operation, the key is recovered from the register for use in a second encrypting operation.
1. A cryptographic system, comprising:
a register containing key data for a key;
an input/output data block containing data for encryption;
a processor coupled to the register and the input/output data block, operable for:
receiving the data from the input/output data block, the data comprising a first sub-block of a block of data, wherein the number of bits in the first sub-block of data is less than or equal to the total number of bits in the block of data;
performing a first encrypting operation on the first sub-block of data, the encrypting operation including computing a key schedule using the register as a workspace, wherein the computing overwrites the key data for the key resulting in the register containing data other than the key data for the key;
at the end of the first encrypting operation on the first sub-block of data:
computing an inverse key schedule for the key schedule used in the first encrypting operation to recover the key data for the key; and
restoring the recovered key data for the key to the register, wherein the restoring overwrites the data other than the key data for the key in the register;
receiving, from the input/output data block, data comprising a second sub-block of the block of data, wherein the number of bits in the second sub-block of data is equal to the number of bits in the first sub-block of data; and
performing a second encrypting operation on the second sub-block of data using the recovered key data for the key.
2. A cryptographic system, comprising:
a register containing key schedule data;
an input/output data block containing data for decryption;
a processor coupled to the register and the input/output data block, operable for:
receiving the data from the input/output data block, the data comprising a first sub-block of a block of data, wherein the number of bits in the first sub-block of data is less than or equal to the total number of bits in the block of data;
performing a first decrypting operation on the first sub-block of data, the decrypting operation including computing an inverse key schedule using the register as a workspace, wherein the computing overwrites the key schedule data resulting in the register containing data other than the key schedule data, the data comprising a key;
at the end of the first decrypting operation on the first sub-block of data:
performing a key expansion operation on the key to recover the key schedule data; and
restoring the recovered key schedule data to the register, wherein the restoring overwrites the data other than the key schedule data in the register;
receiving, from the input/output data block, data comprising a second sub-block of the block of data, wherein the number of bits in the second sub-block of data is equal to the number of bits in the first sub-block of data; and
performing a second decrypting operation on the second sub-block of data using the recovered key schedule data.
3. A method for encrypting data in a cryptographic system, the method comprising:
receiving a block of data for encryption;
determining a number of bits in a sub-block of data, wherein the number of bits in a sub-block of data is less than or equal to the number of bits in the block of data;
determining a plurality of sub-blocks of data that comprise the block of data;
obtaining key data for a key, the key data contained in a register;
performing an encryption operation on a first sub-block of data, wherein the encryption operation comprises:
computing a key schedule using the register as a workspace, wherein the computing overwrites the key data for the key resulting in the register containing data other than the key data for the key;
at the end of the encryption operation on the first sub-block of data:
computing an inverse key schedule for the key schedule used in the first encrypting operation to recover the key data for the key; and
restoring the recovered key data for the key to the register, wherein the restoring overwrites the data other than the key data for the key in the register; and
performing the encryption operation on a second sub-block of data using the recovered key data for the key.
4. The method of claim 3 , where the number of bits is 128.
5. A method for decrypting data in a cryptographic system, the method comprising:
receiving a block of data for decryption;
determining a number of bits in a sub-block of data, wherein the number of bits in a sub-block of data is less than or equal to the number of bits in the block of data;
determining a plurality of sub-blocks of data that comprise the block of data;
obtaining key schedule data, the key schedule data contained in a register;
performing a decryption operation on a first sub-block of data, wherein the decryption operation comprises:
computing an inverse key schedule using the register as a workspace, wherein the computing overwrites the key schedule data resulting in the register containing data other than the key schedule data, the data comprising a key;
at the end of the decryption operation on the first sub-block of data:
performing a key expansion operation on the key to recover the key schedule data; and
restoring the recovered key schedule data to the register, wherein the restoring overwrites the data other than the key schedule data in the register; and
performing the decryption operation on a second sub-block of data using the recovered key schedule data.
6. The method of claim 5 , where the number of bits is 128.
7. A system for encrypting data in a cryptographic system, the system comprising:
an interface operable for receiving a block of data for encryption; and
a processor coupled to the interface, the processor operable for:
determining a number of bits in a sub-block of data, wherein the number of bits in a sub-block of data is less than or equal to the number of bits in the block of data;
determining a plurality of sub-blocks of data that comprise the block of data;
obtaining key data for a key, the key data contained in a register;
performing an encryption operation on a first sub-block of data, wherein the encryption operation comprises:
computing a key schedule using the register as a workspace, wherein the computing overwrites the key data for the key resulting in the register containing data other than the key data for the key;
at the end of the encryption operation on the first sub-block of data:
computing an inverse key schedule for the key schedule used in the first encrypting operation to recover the key data for the key; and
restoring the recovered key data for the key to the register, wherein the restoring overwrites the data other than the key data for the key in the register; and
performing the encryption operation on a second sub-block of data using the recovered key.
8. The system of claim 7 , where the number of bits is 128.
9. A system for decrypting data in a cryptographic system, the system comprising:
an interface operable for receiving a block of data for decryption; and
a processor operatively coupled to the interface, the processor operable for:
determining a number of bits in a sub-block of data, wherein the number of bits in a sub-block of data is less than or equal to the number of bits in the block of data;
determining a plurality of sub-blocks of data that comprise the block of data;
obtaining key schedule data, the key schedule data contained in a register;
performing a decryption operation on a first sub-block of data, wherein the decryption operation comprises:
computing an inverse key schedule using the register as a workspace, wherein the computing overwrites the key schedule data resulting in the register containing data other than the key schedule data, the data comprising a key;
at the end of the decryption operation on the first sub-block of data:
performing a key expansion operation on the key to recover the key schedule data; and
restoring the recovered key schedule data to the register, wherein the restoring overwrites the data other than the key schedule data in the register; and
performing the decryption operation on a second sub-block of data using the recovered key schedule.
10. The system of claim 9 , where the number of bits is 128.
11. The system of claim 1 , further comprising:
an operation register including one or more bits, wherein before performing the first encrypting operation the one or more bits are set for an encryption operation with key recovery.
12. The system of claim 2 , further comprising:
an operation register including one or more bits, wherein before performing the first decrypting operation the one or more bits are set for a decryption operation with key recovery.
13. The method of claim 3 , further comprising:
determining, before performing the encryption operation on the first sub-block of data, that one or more bits included in an operation register are set for an encryption operation with key recovery.
14. The method of claim 5 , further comprising:
determining, before performing the decryption operation on the first sub-block of data, that one or more bits included in an operation register are set for a decryption operation with key recovery.
15. The system of claim 7 , wherein:
before performing the encryption operation on the first sub-block of data, determining that one or more bits included in an operation register are set for an encryption operation with key recovery.
16. The system of claim 9 , wherein:
before performing the decryption operation on the first sub-block of data, determining that one or more bits included in an operation register are set for a decryption operation with key recovery.
17. The system of claim 1 , wherein:
performing a first encrypting operation on a first sub-block of data results in an encrypted first sub-block of data, and wherein the processor is further operable for:
providing the resultant encrypted first sub-block of data to the input/output data block.
18. The system of claim 2 , wherein:
performing a first decrypting operation on a first sub-block of data results in a decrypted first sub-block of data, and wherein the processor is further operable for:
providing the resultant decrypted first sub-block of data to the input/output data block.
19. The method of claim 3 , wherein performing an encryption operation on a first sub-block of data results in an encrypted first sub-block of data, and wherein the method further comprises:
providing the resultant encrypted first sub-block of data to one or more output data registers before performing the encryption operation on the second sub-block of data using the recovered key data for the key.
20. The method of claim 5 , wherein performing a decryption operation on a first sub-block of data results in a decrypted first sub-block of data, and wherein the method further comprises:
providing the resultant decrypted first sub-block of data to one or more output data registers before performing the decryption operation on the second sub-block of data using the recovered key schedule data.
21. The system of claim 7 , wherein performing an encryption operation on a first sub-block of data results in an encrypted first sub-block of data, and wherein the processor is further operable for:
providing the resultant encrypted first sub-block of data to one or more output data registers before performing the encryption operation on the second sub-block of data using the recovered key.
22. The system of claim 9 , wherein performing a decryption operation on a first sub-block of data results in a decrypted first sub-block of data, and wherein the processor is further operable for:
providing the resultant decrypted first sub-block of data to one or more output data registers before performing the decryption operation on the second sub-block of data using the recovered key schedule.