IP Library Granted Patent US 8,006,045
Granted Patent B2
US 8,006,045 · App. 12/395,572 · Granted Aug 23, 2011

Dummy write operations

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Quick Facts
Patent No.
US 8,006,045
App. No.
12/395,572
Granted
Aug 23, 2011
Kind
B2
Abstract

A dummy write operation is disclosed that mimics an actual write operation to a memory array. In some implementations, a dummy write operation mimics an actual write operation by starting a charge pump, selecting a correct data line in the memory array, and by following the sequencing of an actual write operation. By mimicking an actual write operation, an attacker cannot use power analysis to distinguish between dummy and actual write operations. For example, PIN comparison operations would present the same or substantially the same power trace for both positive and negative comparisons, making it difficult for an attacker to determine if a retry count was written to NVM.

Claims (25)

1. A method of performing a dummy write operation on non-volatile memory, comprising:

receiving a write command;

configuring circuitry for accessing the non-volatile memory for a write operation;

determining a type of write operation to be performed on the non-volatile memory;

if a dummy write operation is not to be performed,

writing to the non-volatile memory; and

if a dummy write operation is to be performed,

not writing to the non-volatile memory.

2. The method of claim 1 , further comprising:

detecting an intrusion event; and

encoding the write command to indicate a dummy write operation.

3. The method of claim 1 , where preparing circuitry includes starting a charge pump.

4. The method of claim 1 , where preparing circuitry includes selecting one or more data lines.

5. The method of claim 4 , where selecting one or more data lines includes configuring one or more address decoders.

6. The method of claim 1 , where preparing circuitry includes performing a sequence of tasks to prepare the non-volatile memory for either a dummy write operation or an actual write operation, the sequence of tasks being substantially the same sequence of tasks whether for a dummy write operation or an actual write operation.

7. An integrated circuit device, comprising:

a non-volatile memory array; and

circuitry coupled to the non-volatile memory array for:

receiving a write command;

configuring circuitry for accessing the non-volatile memory for a write operation;

determining a type of write operation to be performed on the non-volatile memory array;

if a dummy write operation is not to be performed, writing to the non-volatile memory array; and

if a dummy write operation is to be performed, not writing to the non-volatile memory array.

8. The device of claim 7 , where the circuitry includes a charge pump.

9. The device of claim 7 , where the circuitry includes one or more decoders for selecting one or more data lines of the non-volatile memory.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 3, 2020
From: RAMBUS INC.
To: CRYPTOGRAPHY RESEARCH, INC.
Reel/Frame 054539/0109 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 12, 2019
From: VERIMATRIX
To: RAMBUS INC.
Reel/Frame 051262/0413 →
CHANGE OF ADDRESS Recorded Oct 16, 2019
From: VERIMATRIX
To: VERIMATRIX
Reel/Frame 050733/0003 →
CHANGE OF NAME Recorded Oct 7, 2019
From: INSIDE SECURE
To: VERIMATRIX
Reel/Frame 050647/0428 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2012
From: ATMEL ROUSSET S.A.S.
To: INSIDE SECURE
Reel/Frame 028522/0371 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 17, 2010
From: ATMEL CORPORATION
To: ATMEL ROUSSET S.A.S.
Reel/Frame 024097/0324 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 25, 2009
From: DUPAQUIS, VINCENT; DEBAENST, PATRICK
To: ATMEL CORPORATION
Reel/Frame 022447/0423 →