Analog processor comprising quantum devices
View Patent ↗Analog processors for solving various computational problems are provided. Such analog processors comprise a plurality of quantum devices, arranged in a lattice, together with a plurality of coupling devices. The analog processors further comprise bias control systems each configured to apply a local effective bias on a corresponding quantum device. A set of coupling devices in the plurality of coupling devices is configured to couple nearest-neighbor quantum devices in the lattice. Another set of coupling devices is configured to couple next-nearest neighbor quantum devices. The analog processors further comprise a plurality of coupling control systems each configured to tune the coupling value of a corresponding coupling device in the plurality of coupling devices to a coupling. Such quantum processors further comprise a set of readout devices each configured to measure the information from a corresponding quantum device in the plurality of quantum devices.
1. A computational system, comprising:
a computer; and
a quantum processor in communication with the computer, the quantum processor comprising:
(i) a plurality of quantum devices, wherein each quantum device in the plurality of quantum devices has a respective first basis state and a respective second basis state; and
(ii) a plurality of coupling devices, wherein a first coupling device in the plurality of coupling devices couples a first quantum device in the plurality of quantum devices to a second quantum device in the plurality of quantum devices, and wherein the first coupling device is configured to tune a coupling strength between the first quantum device and the second quantum device so that the first quantum device and the second quantum device couple either ferromagnetically or anti-ferromagnetically.
2. The system of claim 1 wherein a quantum device in the plurality of quantum devices comprises a loop of superconducting material interrupted by at least one Josephson junction.
3. The system of claim 2 wherein at least one of the Josephson junctions in the quantum device is a compound Josephson junction.
4. The system of claim 1 wherein the plurality of quantum devices is arranged in a two-dimensional array, and wherein the two-dimensional array comprises an interior and a perimeter.
5. The system of claim 4 wherein each quantum device in the interior is coupled to four nearest-neighbor quantum devices and is coupled to four next-nearest neighbor quantum devices.
6. The system of claim 1 wherein at least one quantum device in the plurality of quantum devices has a gradiometric configuration.
7. The system of claim 1 wherein
the plurality of quantum devices is arranged in a lattice;
the first quantum device and the second quantum device are nearest neighbors in the lattice; and
a second coupling device in the plurality of coupling devices couples the first quantum device to a third quantum device in the plurality of quantum devices, wherein the first quantum device and the third quantum device are next-nearest neighbors in the lattice.
8. The system of claim 1 wherein at least one coupling device in the plurality of coupling devices comprises a loop of superconducting material interrupted by at least one Josephson junction.
9. The system of claim 1 wherein at least one coupling device in the plurality of coupling devices comprises a loop of superconducting material interrupted by at least one compound Josephson junction.
10. The system of claim 1 wherein at least one coupling device in the plurality of coupling devices is selected from the group consisting of an rf-SQUID and a dc-SQUID.
11. The system of claim 1 the quantum processor further comprising:
a readout device that is configured to readout a state of at least one quantum device in the plurality of quantum devices.
12. The system of claim 11 wherein the readout device is selected from the group consisting of a dc-SQUID and a magnetometer.
13. The system of claim 1 wherein the first coupling device is configured such that a zero effective local field bias is applied to the first quantum device.
14. The system of claim 1 wherein the first quantum device and the second quantum device are nearest neighbors in the lattice.
15. The system of claim 1 wherein the first quantum device and the second quantum device are next-nearest neighbors.
16. The system of claim 1 wherein the quantum processor is used to solve a computational problem selected from the group consisting of a problem having a complexity of P, a problem having a complexity of NP, a problem having a complexity of NP-Hard, and a problem having a complexity of NP-Complete.
17. The system of claim 16 wherein the quantum processor is coupled with a transmitter, and wherein the transmitter is configured to transmit a solution of the computational problem as a data signal embodied in a carrier wave.
18. The system of claim 1 wherein the computer is a digital computer.
19. A computational system, comprising:
a local computer;
a remote computer;
a remote quantum processor in communication with the remote computer, the quantum processor comprising:
(i) a plurality of quantum devices, wherein each quantum device in the plurality of quantum devices has a respective first basis state and a respective second basis state; and
(ii) a plurality of coupling devices, wherein a first coupling device in the plurality of coupling devices couples a first quantum device in the plurality of quantum devices to a second quantum device in the plurality of quantum devices, wherein
the local computer is configured to send a computational problem to be solved to the remote computer; and
the remote computer is configured to send an answer to the computational problem to the local computer.