IP Library Granted Patent US 7,863,989
Granted Patent B2
US 7,863,989 · App. 12/400,999 · Granted Jan 4, 2011

Replica-bias automatic gain control

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,863,989
App. No.
12/400,999
Granted
Jan 4, 2011
Kind
B2
Abstract

A gain control system comprises a reference stage, a bias replication stage, an operational amplifier, an automatic gain control block, a gain stage, and a crystal oscillator in one embodiment. A negative feedback loop is formed by portions of the operational amplifier, the replica biasing stage, the gain stage, and the automatic gain control stage. The negative feedback loop operatively controls an amplitude of oscillation in the crystal oscillator. The automatic gain control block produces output currents at reference levels in proportion to an input current source. The output current reference levels provide a corresponding yet independent scaling of currents in the bias replication stage and the gain stage. By the scaling capabilities provided a high common mode of voltage is provided between the crystal oscillator and the voltage reference section while stable oscillating characteristics are provided over a broad frequency range.

Claims (105)

1. An oscillator control system comprising:

an oscillation module configured to output an oscillator output signal having an amplitude and a common mode;

an automatic gain control (AGC) module in operative communication with the oscillation module, and configured to:

generate a gain control signal as a function of the amplitude of the oscillator output signal; and

generate a replica control signal as a function of the amplitude of the oscillator output signal;

a gain control module, in operative communication with the oscillation module, and configured to provide a magnitude of gain to the oscillation module as a function of the gain control signal;

a replica bias module, in operative communication with the AGC module, and configured to:

generate a replica feedback signal as a function of the replica control signal;

compare the replica feedback signal with a reference signal; and

generate a bias control signal as a function of comparing the replica feedback signal with the reference signal; and

a bias control module, in operative communication with the replica bias module and the oscillation module, and configured to control the common mode of the oscillator output signal as a function of the bias control signal.

2. The oscillator control system of claim 1 , wherein the AGC module comprises:

an AGC reference generator block, configured to generate a reference gain level;

an amplitude detector block, configured to monitor the amplitude of the oscillator output signal; and

an AGC comparison block, configured to generate the gain control signal as a function of a comparison between the amplitude of the oscillator output signal and the reference gain level.

3. The oscillator control system of claim 2 , wherein the AGC module comprises:

a current source configured to output a substantially constant magnitude of current,

wherein the AGC reference generator block is configured to generate the reference gain level as a function of the magnitude of current output by the current source.

4. The oscillator control system of claim 2 , wherein the AGC module comprises:

a current source configured to output a substantially constant magnitude of current,

wherein the gain control signal and the replica control signal are generated further as a function of the magnitude of current output by the current source.

5. The oscillator control system of claim 2 ,

wherein the AGC comparison block is configured to generate the gain control signal such that the gain control signal is functionally related to the amplitude of the oscillator output signal.

6. The oscillator control system of claim 1 , further comprising:

a reference generator module, configured to generate the reference signal.

7. The oscillator control system of claim 6 , wherein:

the reference generator module comprises a first current source and the AGC module comprises a second current source.

8. The oscillator control system of claim 7 , wherein:

each of the first current source and the second current source is configured to output substantially a same magnitude of current.

9. The oscillator control system of claim 6 , wherein:

the reference generator module is configured to generate the reference signal as a function of a first scaling factor; and

the AGC module is configured to generate the replica control signal as a function of a second factor, the second factor being a multiple of the first scaling factor.

10. The oscillator control system of claim 6 , wherein:

the reference generator module is configured to generate the reference signal as a function of a first scaling factor; and

the gain control module is configured to generate the magnitude of gain as a function of a second factor, the second factor being a multiple of the first scaling factor.

11. The oscillator control system of claim 6 , wherein:

the reference generator module is configured to generate the reference signal as a function of a first scaling factor; and

the AGC module is configured to generate the replica control signal as a function of a second factor, the second factor being a multiple of the first scaling factor;

the gain control module is configured to generate the magnitude of gain as a function of a third factor, the third factor being a multiple of the first scaling factor.

12. The oscillator control system of claim 6 , further comprising:

a gain module, comprising the gain control module and the bias control module, the gain module being configured according to a first topology,

wherein the reference generator is configured according to a second topology, the second topology being substantially identical to the first topology.

13. The oscillator control system of claim 1 , wherein:

the replica bias module comprises a set of devices, each device having a magnitude of transconductance, the replica feedback signal being generated as a function of the replica control signal and the magnitude of transconductance.

14. The oscillator control system of claim 1 , further comprising:

a gain module, comprising the gain control module and the bias control module, the gain module being configured according to a first topology, the first topology comprising a first set of devices, each of the first set of devices having a magnitude of transconductance.

15. The oscillator control system of claim 14 , wherein:

the replica bias module is configured according to a second topology, the second topology comprising a second set of devices, each of the second set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices.

16. The oscillator control system of claim 14 , further comprising:

a reference generator module, configured to generate the reference signal,

wherein the reference generator module is configured according to a second topology, the second topology comprising a second set of devices, each of the second set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices.

17. The oscillator control system of claim 14 , further comprising:

a reference generator module, configured to generate the reference signal,

wherein the reference generator module is configured according to a second topology, the second topology comprising a second set of devices, each of the second set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices, and

wherein the replica bias module is configured according to a third topology, the third topology comprising a third set of devices, each of the third set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices.

18. The oscillator control system of claim 14 , wherein the first set of devices comprises:

an NMOS transistor, a first PMOS transistor, and a second a PMOS transistor, coupled in series to form a current path between a source voltage terminal and a ground terminal,

wherein the NMOS transistor is controlled as least partially as a function of the gain control signal, and

the first PMOS transistor is controlled at least partially as a function of the bias control signal.

19. The oscillator control system of claim 1 , wherein the gain control signal and the replica control signal are configured to be substantially equal over a portion of an operating range of the oscillation block.

20. The oscillator control system of claim 1 , wherein the oscillation module comprises a crystal oscillator configured to generate the oscillator output signal.

21. The oscillator control system of claim 20 , wherein the crystal oscillator is configured in a Pierce oscillator configuration.

22. A clock circuit arrangement comprising:

an oscillation module configured to output an oscillator output signal having an amplitude, a common mode, and an oscillation frequency;

an automatic gain control (AGC) module in operative communication with the oscillation module, and configured to:

generate a gain control signal as a function of the amplitude of the oscillator output signal; and

generate a replica control signal as a function of the amplitude of the oscillator output signal;

a gain control module, in operative communication with the oscillation module, and configured to provide a magnitude of gain to the oscillation module as a function of the gain control signal;

a replica bias module, in operative communication with the AGC module, and configured to:

generate a replica feedback signal as a function of the replica control signal;

compare the replica feedback signal with a reference signal; and

generate a bias control signal as a function of comparing the replica feedback signal with the reference signal;

a bias control module, in operative communication with the replica bias module and the oscillation module, and configured to control the common mode of the oscillator output signal as a function of the bias control signal; and

a clock processing module, in operative communication with the oscillation module, and configured to generate at least one clock output signal as a function of the oscillation frequency.

23. The clock circuit arrangement of claim 22 , wherein the clock processing module comprises:

a phase lock loop configured to generate each of the at least one clock output signal to have a respective output clock frequency, each respective output clock frequency being mathematically related to the oscillation frequency.

24. The clock circuit arrangement of claim 22 , further comprising:

a programming module, configured to output at least one configuration signal as a function of a programming configuration, the at least one configuration signal being configured to affect operation of at least one of the oscillation module, the AGC module, the gain control module, the replica bias module, the bias control module, or the clock processing module.

25. The clock circuit arrangement of claim 22 , further comprising:

a gain module, comprising the gain control module and the bias control module, the gain module being configured according to a first topology, the first topology comprising a first set of devices, each of the first set of devices having a magnitude of transconductance.

26. The clock circuit arrangement of claim 25 , wherein:

the replica bias module is configured according to a second topology, the second topology comprising a second set of devices, each of the second set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices.

27. The clock circuit arrangement of claim 25 , further comprising:

a reference generator module, configured to generate the reference signal,

wherein the reference generator module is configured according to a second topology, the second topology comprising a second set of devices, each of the second set of devices corresponding to one of the first set of devices and having a magnitude of transconductance that is a multiple of the magnitude of transconductance of the corresponding one of the first set of devices.

28. The clock circuit arrangement of claim 22 , further comprising:

a housing, comprising a set of interface terminals, the housing configured to:

at least partially house the oscillation module, the AGC module, the gain control module, the replica bias module, the bias control module, and the clock processing module; and

provide at least one external coupling to the clock processing module via the set of interface terminals.

29. A method for controlling an output of an oscillator, the method comprising:

determining an amplitude level of the output of the oscillator;

determining a common mode level of the output of the oscillator;

generating a gain control signal as a function of the amplitude level;

generating a replica control signal as a function of the amplitude level;

generating a replica feedback signal as a function of the replica control signal;

generating a bias control signal as a function of a comparison between the replica control signal and a reference level;

regulating the amplitude level as a function of the gain control signal;

regulating the common mode level as a function of the bias control signal.

30. The method of claim 29 , wherein:

generating the gain control signal as a function of the amplitude level comprises:

generating a second reference level;

comparing the amplitude level with the second reference level; and

generating the gain control signal as a function of comparing the amplitude level with the second reference level.

31. The method of claim 29 , further comprising:

generating the reference level.

Assignments (7)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2013
From: SILICON LABS SPECTRA, INC.
To: SILICON LABORATORIES INC.
Reel/Frame 030696/0263 →
RELEASE OF SECURITY INTEREST Recorded Feb 8, 2011
From: SILICON VALLEY BANK
To: SPECTRA LINEAR, INC.
Reel/Frame 025772/0139 →
RELEASE OF SECURITY INTEREST Recorded Feb 8, 2011
From: MMV FINANCE, INC.
To: SPECTRA LINEAR, INC.
Reel/Frame 025771/0730 →
MERGER Recorded Jan 31, 2011
From: SPECTRA LINEAR, INC.
To: SILICON LABS SPECTRA, INC.
Reel/Frame 025722/0169 →
SECURITY AGREEMENT Recorded Nov 22, 2010
From: SPECTRA LINEAR, INC.
To: MMV FINANCE INC.
Reel/Frame 025411/0457 →
SECURITY AGREEMENT Recorded Nov 17, 2010
From: SPECTRA LINEAR, INC.
To: SILICON VALLEY BANK
Reel/Frame 025386/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 21, 2009
From: ORBERK, OMER FATIH; SHKIDT, ALEXEI
To: SPECTRALINEAR, INC.
Reel/Frame 022571/0314 →