IP Library Granted Patent US 7,928,883
Granted Patent B2
US 7,928,883 · App. 12/403,704 · Granted Apr 19, 2011

Multiple digital signals from a single integrated circuit

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Quick Facts
Patent No.
US 7,928,883
App. No.
12/403,704
Granted
Apr 19, 2011
Kind
B2
Abstract

Multiple digital signals from a single integrated circuit (IC) may be provided. The IC may receive an analog signal comprising a plurality of channels, convert the analog signal to a digital signal, and provide the digital signal to a plurality of digital channel tuners. The tuners may each select one of the plurality of channels and provide the selected channels as a plurality of digital output signals. A signal conditioner may be used to prepare the analog signal for digitization.

Claims (49)

1. A method for converting an analog signal into a digital signal, the method comprising:

receiving an analog signal comprising a plurality of channels;

digitizing the analog signal;

selecting a subset of the plurality of channels from the digitized analog signal, wherein each of the subset of the plurality of channels is selected for one of a plurality of digital signal processing tuners;

providing each of the subset of the selected plurality of channels as a plurality of digital output signals from each of the plurality of digital signal processing tuners; and

multiplexing each of the selected channels output by each of the plurality of digital signal processors into a single digital output signal.

2. The method of claim 1 , further comprising conditioning the analog signal prior to digitizing the analog signal.

3. The method of claim 2 , wherein conditioning the analog signal comprises at least one of the following: amplifying the analog signal and attenuating the analog signal.

4. The method of claim 2 , wherein conditioning the analog signal comprises adjusting a frequency response of the analog signal.

5. The method of claim 2 , further comprising, in response to at least one measured characteristic of the digitized analog signal, modifying the conditioning of the analog signal.

6. The method of claim 1 , wherein digitizing the analog signal comprises passing the analog signal through an analog-to-digital converter operating at a sampling frequency of at least 2.4 times an expected maximum frequency component of the analog signal.

7. The method of claim 6 , further comprising, prior to digitizing the analog signal, using a low-pass filter to remove frequency components above the expected maximum frequency component of the analog signal.

8. A system for providing a plurality of digital channels, the system comprising:

an input signal conditioner operative to condition an analog signal comprising:

at least one input filter operative to remove at least one frequency component from the analog signal,

at least one gain controller operative to attenuate the analog signal,

at least one tilt compensator operative to adjust a frequency response of the analog signal, and

at least one amplifier; and

a multiple tuner circuit operative to receive the analog signal from the input signal conditioner comprising:

an analog-to-digital converter operative to convert the analog signal into a digitized source signal,

a plurality of digital signal processing tuners each operative to select at least one channel from a plurality of channels carried by the digitized source signal and output the selected at least one channel as a digital channel output signal, and

a multiplexer operative to combine each of the digital output signals output by the plurality of digital signal processing tuners into a single digital signal.

9. The system of claim 8 , wherein the analog signal comprises a cable television signal comprising a plurality of frequency components between 54 MHz and 1002 MHz.

10. The system of claim 9 , further comprising at least one decimator operative to reduce a sample rate of at least one of: the digitized source signal and the digital channel output signal.

11. The system of claim 8 , wherein the multiple tuner circuit further comprises a crystal oscillator coupled to a frequency synthesizer operative to generate a clock signal.

12. The system of claim 11 , wherein a sampling rate of the analog-to-digital converter is controlled by the clock signal.

13. The system of claim 11 , wherein the multiple tuner circuit further comprises a tilt control monitor operative to:

determine whether a tilt is occurring in the selected frequency band output by at least one of the programmable band select filters; and

provide a control signal to the tilt compensator of the input signal conditioner to adjust for the determined tilt.

14. The system of claim 8 , wherein the multiple tuner circuit further comprises a plurality of programmable band select filters each associated with one of the plurality of digital signal processing tuners and operative to select a frequency band of the digitized source signal.

15. The system of claim 8 , wherein the multiple tuner circuit further comprises a gain control operative to:

determine whether a power level of the digitized source signal is greater than a maximum expected power level; and

in response to determining that a power level of the digitized source signal is greater than a maximum expected power level, generate a control signal to the at least one gain controller of the input signal conditioner to attenuate the analog input signal.

16. An apparatus for converting an analog signal into a digital signal comprising:

an analog-to-digital converter operative to:

receive the analog signal, wherein the analog signal comprises a plurality of modulated frequency components, and

digitize the analog input signal;

a frequency band selector operative to provide a plurality of digital signals, wherein each of the plurality of digital signals comprises a subset of the plurality of modulated frequency components;

a plurality of digital signal processors each operative to:

receive at least one of the plurality of digital signals, and

output a selected channel from the received at least one of the plurality of digital signals; and

a multiplexor operative to:

receive each of the selected channels output by each of the plurality of digital signal processors, and

combine the received channels into a single digital output signal.

17. The apparatus of claim 16 , wherein the frequency band selector comprises at least one of: a plurality of programmable band pass filters and a plurality of downconverters.

18. The apparatus of claim 17 , further comprising a clipping detector operative to:

determine whether the digitized input signal is exceeding an output range of the analog-to-digital converter; and

in response to determining that the digitized input signal is exceeding the output range of the analog-to-digital converter, adjusting a level threshold of an automatic gain controller.

19. The apparatus of claim 16 , further comprising at least one decimator operative to reduce the sample rate of the digitized analog input signal.

Assignments (6)
CORRECTIVE ASSIGNMENT TO CORRECT THE PATENT 7523479 NEEDS TO BE INCLUDED, WAS ACCIDENTALLY MISSED WHEN RECORDING ASSIGNMENT PREVIOUSLY RECORDED ON REEL 049603 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE NEED TO INCLUDE PATENT 7523479 IN THE ASSIGNMENT. WAS ACCIDENTALLY MISSED ON LAST RECORDING. Recorded Jun 9, 2021
From: CISCO TECHNOLOGY, INC.
To: TECH 5 SAS
Reel/Frame 058043/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 27, 2019
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 049607/0001 →
MERGER Recorded Jun 26, 2019
From: TECH 5
To: THOMSON LICENSING
Reel/Frame 049601/0593 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 26, 2019
From: THOMSON LICENSING
To: INTERDIGITAL CE PATENT HOLDINGS
Reel/Frame 049602/0683 →
CORRECTIVE ASSIGNMENT TO CORRECT THE 7923479 PATENT NUMBER ADDED PREVIOUSLY RECORDED AT REEL: 49603 FRAME: 0001. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded Jun 26, 2019
From: CISCO TECHNOLOGY, INC.
To: TECH 5
Reel/Frame 049603/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2009
From: ROBERTSON, NEIL C.; FERNANDEZ, JOSE M.; MONTREUIL, LEO
To: CISCO TECHNOLOGY, INC.
Reel/Frame 022701/0697 →