IP Library Granted Patent US 8,247,857
Granted Patent B2
US 8,247,857 · App. 12/405,474 · Granted Aug 21, 2012

Nonvolatile semiconductor memory device and method for manufacturing same

Assignee: Kabushiki Kaisha Toshiba
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Quick Facts
Patent No.
US 8,247,857
App. No.
12/405,474
Granted
Aug 21, 2012
Kind
B2
Abstract

A nonvolatile semiconductor memory device includes: a semiconductor member; a memory film provided on a surface of the semiconductor member and being capable of storing charge; and a plurality of control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface. Average dielectric constant of a material interposed between one of the control gate electrodes and a portion of the semiconductor member located immediately below the control gate electrode adjacent to the one control gate electrode is lower than average dielectric constant of a material interposed between the one control gate electrode and a portion of the semiconductor member located immediately below the one control gate electrode.

Claims (17)

1. A nonvolatile semiconductor memory device comprising:

a semiconductor member;

a memory film provided on a surface of the semiconductor member;

first and second control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface; and

a single-layered intercellular dielectric film provided between the first and the second control gate electrodes and spacing the first and second control gate electrodes, wherein the single-layered intercellular dielectric film in physical contact with the memory film;

a first portion of the memory film located immediately below the single-layered intercellular dielectric film having a dielectric constant lower than a dielectric constant of another portions of the memory film located immediately below the first and second control gate electrodes, and

a concentration of hydrogen or a halogen element in the first portion of the memory film located immediately below the single-layered intercellular dielectric film being higher than the concentration of hydrogen or the halogen element in the another portions of the memory film located immediately below the first and second control gate electrode electrodes.

2. The memory device according to claim 1 , further comprising:

a dielectric layer provided between the memory film and the first and second control gate electrodes and having a higher dielectric constant than that of the single-layered intercellular dielectric film.

3. The memory device according to claim 1 , wherein the semiconductor member is a substrate supporting the memory film and the first and second control gate electrodes, or an upper portion of the substrate.

4. A nonvolatile semiconductor memory device comprising:

a semiconductor member; a memory film provided on a surface of the semiconductor member;

first and second control gate electrodes provided on the memory film, spaced from each other, and arranged along a direction parallel to the surface; and

a single-layered intercellular dielectric film provided between the first and the second control gate electrodes and spacing the first and second control gate electrodes, wherein the single-layered intercellular dielectric film in physical contact with the memory film;

a first portion of the memory film located immediately below the single-layered intercellular dielectric film having a dielectric constant lower than a dielectric constant of another portions of the memory film located immediately below the first and second control gate electrodes, and

a concentration of a metallic element which makes the dielectric constant of a compound forming the memory film lower being higher in the first portion of the memory film located immediately below the single-layered intercellular dielectric film than that in the another portions of the memory film located immediately below the first and second control gate electrode electrodes.

5. The memory device according to claim 4 , wherein the semiconductor member is a substrate supporting the memory film and first and second control gate electrodes, or an upper portion of the substrate.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2009
From: OZAWA, YOSHIO; AISO, FUMIKI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022418/0559 →
Priority Claims (1)
JP 2008-144736 · Jun 2, 2008 · national
Continuity (1)
Related Publication 20090294828A1 · Dec 3, 2009