Wideband CMOS RMS power detection scheme
View Patent ↗A system includes a first circuit and a second circuit. The first circuit includes a first MOS transistor having a gate and a drain. The first circuit is configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor. The drain of the first MOS transistor is configured to output a first current that is proportional to the square of the input voltage of the RF signal while receiving the RF signal. The second circuit includes a second MOS transistor having a source configured to receive a first current from the first circuit. The second MOS transistor is biased in a triode region and has a channel resistance between the source and a drain. The second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit.
1. A system comprising:
a) a first circuit including a first MOS transistor having a gate and a drain, the first circuit configured to receive a radio frequency (RF) signal at the gate of the first MOS transistor, the drain of the first MOS transistor configured to output a first current proportional to the square of the input voltage of the RF signal while receiving the RF signal, the first circuit further configured to subtract a DC bias current from the first current; and
b) a second circuit connected to the first circuit, the second circuit including a second MOS transistor having a source configured to receive the first current from the first circuit, the second MOS transistor biased in a triode region and having a channel resistance between the source and a drain;
c) wherein the second circuit is configured to output a voltage proportional to the value of the power of the RF signal received by the first circuit, the output voltage being a function of the first current and the channel resistance between the source and the drain of the second MOS transistor;
d) a correction loop connected to a gate of the second MOS transistor and to an output of the second circuit, the correction loop configured to maintain the second MOS transistor biased in the triode region.
2. The system of claim 1 , wherein the correction loop is configured to vary the voltage applied to the gate of the second MOS transistor based in part on the output voltage of the second circuit.
3. The system of claim 1 , wherein the second circuit includes a low-pass filter connected to one of a drain or a source of the second MOS transistor, the low-pass filter configured to remove a high-frequency component from the received RF signal.
4. A method of detecting the power of an RF signal, comprising:
a) receiving an RF signal having a voltage at a first circuit;
b) applying the voltage of the RF signal across a gate of a MOS transistor, the application of the RF signal voltage across the gate of the MOS transistor generating a first current, the first current proportional to the square of the voltage of the RF signal;
c) generating a second current in a second circuit, the second current proportional to the square of the voltage of the RF signal minus a DC offset of the RF signal;
d) receiving the second current at a source of a second MOS transistor, the second MOS transistor biased in a triode region and having a channel resistance between the source and a drain; and
e) outputting a second voltage from the second circuit, the second voltage proportional to the power of the RF signal received by the first circuit, wherein the second voltage is a function of the second current and the channel resistance between the source and the drain of the second MOS transistor;
f) filtering the output voltage through a low-pass filter to remove a high-frequency component.