IP Library Granted Patent US 7,939,859
Granted Patent B2
US 7,939,859 · App. 12/408,291 · Granted May 10, 2011

Solid state imaging device and method for manufacturing the same

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Quick Facts
Patent No.
US 7,939,859
App. No.
12/408,291
Granted
May 10, 2011
Kind
B2
Abstract

A solid state imaging device includes a transfer transistor for transferring signal charges generated by photoelectric conversion to a floating diffusion layer, a reset transistor for resetting a potential of the floating diffusion layer, and an amplifying transistor for outputting a signal corresponding to the potential of the floating diffusion layer. A low concentration impurity region having an impurity concentration lower than that of the first conductivity type semiconductor region is formed in part of a surface portion of the first conductivity type semiconductor region which is located below a gate electrode of the amplifying transistor and serves as a well region of the amplifying transistor.

Claims (26)

1. A solid state imaging device comprising:

a transfer transistor for transferring signal charges generated by photoelectric conversion to a floating diffusion layer;

a reset transistor for resetting a potential of the floating diffusion layer; and

an amplifying transistor for outputting a signal corresponding to the potential of the floating diffusion layer, wherein

the solid state imaging device includes

a first conductivity type semiconductor region serving as a well region of the amplifying transistor, and

a low concentration impurity region which is formed in part of a surface portion of the first conductivity type semiconductor region below a gate electrode of the amplifying transistor, and has an impurity concentration lower than that of the first conductivity type semiconductor region.

2. The solid state imaging device of claim 1 , wherein

the low concentration impurity region is substantially an intrinsic semiconductor region.

3. The solid state imaging device of claim 1 , wherein

the low concentration impurity region has an impurity concentration of 3×10 16 cm 3 or lower.

4. The solid state imaging device of claim 1 , wherein,

the low concentration impurity region has an impurity concentration of ½ or lower of the impurity concentration of the first conductivity type semiconductor region.

5. The solid state imaging device of claim 1 , wherein,

the low concentration impurity region is formed in a region ranging from an interface with a gate insulating film of the amplifying transistor to a depth of 60 nm.

6. The solid state imaging device of claim 1 , wherein,

an STI is formed in part of the first conductivity type semiconductor region between the transfer transistor and the amplifying transistor.

7. A method for manufacturing a solid state imaging device including a transfer transistor for transferring signal charges generated by photoelectric conversion to a floating diffusion layer, a reset transistor for resetting a potential of the floating diffusion layer, and an amplifying transistor for outputting a signal corresponding to the potential of the floating diffusion layer, the method comprising:

(a) forming a first conductivity type semiconductor region serving as a well region of the amplifying transistor on a substrate; and

(b) implanting a second conductivity type impurity to a surface portion of the first conductivity type semiconductor region to form a low concentration impurity region having an impurity concentration lower than that of the first conductivity type semiconductor region and serving as a channel region of the amplifying transistor.

8. The method for manufacturing a solid state imaging device of claim 7 , wherein

the implantation (b) is performed before the formation (a).

9. The method for manufacturing a solid state imaging device of claim 7 , wherein

the low concentration impurity region is substantially an intrinsic semiconductor region.

10. The method for manufacturing a solid state imaging device of claim 7 , wherein

the second conductivity type impurity is arsenic or phosphorus.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 27, 2020
From: PANASONIC CORPORATION
To: PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD.
Reel/Frame 052755/0917 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 8, 2009
From: TSUNO, MORIKAZU
To: PANASONIC CORPORATION
Reel/Frame 022658/0148 →