IP Library Granted Patent US 8,229,020
Granted Patent B2
US 8,229,020 · App. 12/409,236 · Granted Jul 24, 2012

Integrated equalization and CDR adaptation engine with single error monitor circuit

Assignee: Oracle America, Inc.
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Quick Facts
Patent No.
US 8,229,020
App. No.
12/409,236
Granted
Jul 24, 2012
Kind
B2
Abstract

A data communications system and methods are disclosed. The system includes a transmitter for conveying a data signal filtered by a finite impulse response (FIR) filter to a receiver via a channel. The receiver equalizes the received data signal using a decision feedback equalizer (DFE) and the FIR. The receiver samples the data signal to determine an error signal and uses the error signal to adapt settings of a pre-cursor tap coefficient of the FIR, one or more post-cursor tap coefficients of the FIR, a phase of the recovered clock, and a coefficient of the DFE. To adapt the settings, the receiver determines the error signal based on an error sample taken from the data signal in a single clock cycle. To determine an error signal, the receiver samples the data signal at a phase estimated to correspond to a peak amplitude of a pulse response of the channel.

Claims (102)

1. A receiver configured to recover data from an input data signal, wherein the receiver comprises circuitry configured to:

receive a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein to determine an error signal, the circuitry is configured to sample the data signal received at a phase estimated to correspond to a peak amplitude of a pulse response of a channel via which the data signal is received, wherein the phase is based on the recovered clock.

2. The receiver of claim 1 , wherein the error signal comprises a measurement of an amount of inter-symbol interference (ISI) within the data signal.

3. The receiver of claim 1 , wherein for each of the settings the receiver is further configured to integrate a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

4. The receiver of claim 3 , wherein the receiver is further configured to adapt the post-cursor tap coefficient of the FIR and the coefficient of the DFE based on a same one of the plurality of quantities.

5. The receiver of claim 1 , wherein the circuitry is further configured to:

increase a pre-cursor tap coefficient setting in response to determining that the phase of the recovered clock corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decrease a pre-cursor tap coefficient setting in response to determining that the phase of the recovered clock corresponds to a point later than the peak amplitude of the pulse response of the channel.

6. The receiver of claim 1 , wherein the receiver is integrated into a serializer/deserializer.

7. A method of recovering data from an input data signal, the method comprising:

receiving a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determining an error signal based on an error sample taken from the data signal in a single clock cycle; and

conveying a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein to determine an error signal further comprises sampling the data signal received via a channel at a phase estimated to correspond to a peak amplitude of a pulse response of the channel, wherein the phase is based on the recovered clock.

8. The method of claim 7 , wherein the error signal comprises a measurement of an amount of inter-symbol interference (ISI) within the data signal.

9. The method of claim 7 , wherein for each setting the method further comprises integrating a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

10. The method of claim 9 , further comprising adapting the post-cursor tap coefficient of the FIR and the coefficient of the DFE based on a same one of the plurality of quantities.

11. The method of claim 7 , further comprising:

increasing a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decreasing a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point later than the peak amplitude of the pulse response of the channel.

12. A data communications system comprising:

a transmitter configured to convey a data signal filtered by a finite impulse response (FIR) filter via a channel; and

a receiver configured to:

receive the data signal via the channel;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein to determine an error signal, the receiver is further configured to sample the data signal received via the channel at a phase estimated to correspond to a peak amplitude of a pulse response of the channel, wherein the phase is based on the recovered clock.

13. The system of claim 12 , wherein the error signal comprises a measurement of an amount of inter-symbol interference (ISI) within the data signal received via the channel.

14. The system of claim 12 , wherein for each setting the receiver is further configured to integrate a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

15. The system of claim 14 , wherein the receiver is further configured to adapt the post-cursor tap coefficient of the FIR and the coefficient of the DFE based on a same one of the plurality of quantities.

16. The system of claim 12 , wherein the circuitry is further configured to:

increase a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decrease a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point later than the peak amplitude of the pulse response of the channel.

17. The system of claim 12 , wherein the receiver is integrated into a serializer/deserializer.

18. A receiver configured to recover data from an input data signal, wherein the receiver comprises circuitry configured to:

receive a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein for each of the settings the receiver is further configured to integrate a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

19. A receiver configured to recover data from an input data signal, wherein the receiver comprises circuitry configured to:

receive a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein the circuitry is further configured to:

increase a pre-cursor tap coefficient setting in response to determining that the phase of the recovered clock corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decrease a pre-cursor tap coefficient setting in response to determining that the phase of the recovered clock corresponds to a point later than the peak amplitude of the pulse response of the channel.

20. A method of recovering data from an input data signal, the method comprising:

receiving a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determining an error signal based on an error sample taken from the data signal in a single clock cycle; and

conveying a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein for each setting the method further comprises integrating a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

21. A method of recovering data from an input data signal, the method comprising:

receiving a data signal, the data signal having been filtered by a finite impulse response (FIR) filter;

determining an error signal based on an error sample taken from the data signal in a single clock cycle; and

conveying a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

increasing a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decreasing a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point later than the peak amplitude of the pulse response of the channel.

22. A data communications system comprising:

a transmitter configured to convey a data signal filtered by a finite impulse response (FIR) filter via a channel; and

a receiver configured to:

receive the data signal via the channel;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

wherein for each setting the receiver is further configured to integrate a respective one of a plurality of quantities, each quantity derived from a plurality of error samples, each error sample taken from the data signal in a single clock cycle.

23. A data communications system comprising:

a transmitter configured to convey a data signal filtered by a finite impulse response (FIR) filter via a channel; and

a receiver configured to:

receive the data signal via the channel;

determine an error signal based on an error sample taken from the data signal in a single clock cycle; and

convey a feedback signal based on the error signal which may be used to adapt settings of two or more of the following:

one or more post-cursor tap coefficients of the FIR;

a phase of a recovered clock; and

a coefficient of a decision feedback equalizer (DFE);

increase a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point earlier than a peak amplitude of the pulse response of the channel; and

decrease a pre-cursor tap coefficient setting in response to determining that the phase corresponds to a point later than the peak amplitude of the pulse response of the channel.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Dec 16, 2015
From: ORACLE USA, INC.; SUN MICROSYSTEMS, INC.; ORACLE AMERICA, INC.
To: ORACLE AMERICA, INC.
Reel/Frame 037311/0171 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2009
From: HUANG, DAWEI; VAIRAVAN, MUTHUKUMAR; YOON, DONG JOON; DOBLAR, DREW G.
To: SUN MICROSYSTEMS, INC.
Reel/Frame 022443/0001 →
Continuity (1)
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