Single input/output port radio frequency transceiver front end circuit with low noise amplifier switching transistor
A front end circuit for coupling an antenna to a radio frequency (RF) transceiver for time domain duplex systems is disclosed. The front end circuit includes an antenna port, a power amplifier, a low noise amplifier, and a matching network. The output of the power amplifier and the input of the low noise amplifier are coupled to the matching network and connected in common to the antenna. The power amplifier and the low noise amplifier are activated and deactivated in sequence corresponding to the transmit and receive modes of the transceiver, and the matching network minimizes the effect that one has on the other at the designated operating frequency.
1. A radio frequency (RF) transceiver front end circuit with a predefined operating frequency for connecting a transceiver to an antenna, the front end circuit comprising:
an antenna port connectible to the antenna;
a common transmit and receive port;
a power amplifier including a power amplifier transistor having a base, a collector, and an emitter;
a low noise amplifier including a low noise amplifier transistor having a base, a collector, and an emitter;
a matching circuit including a power amplifier output matching segment coupled to the collector of the power amplifier transistor and the antenna port, and a low noise amplifier input matching segment coupled to the base of the low noise amplifier transistor and the antenna port, the power amplifier matching segment having shared components with the low noise amplifier segment;
a power amplifier input matching network coupled to the power amplifier;
a low noise amplifier output matching network coupled to the low noise amplifier; and
a switching transistor selectively connecting the low noise amplifier matching network to the power amplifier input matching network.
2. The front end circuit of claim 1 , wherein the switching transistor is activated by the low noise amplifier control circuit.
3. The front end circuit of claim 1 , wherein the switching transistor is independently activated.
4. The front end circuit of claim 1 , wherein the switching transistor couples the low noise amplifier matching network to the power amplifier matching network at the common transmit and receive port.
5. The front end circuit of claim 4 , wherein the switching transistor is a field effect transistor having a source coupled to the low noise amplifier output matching network, a drain coupled to the common transmit and receive port, and a gate.
6. The front end circuit of claim 4 , wherein the switching transistor is a hetero-junction bipolar transistor.