IP Library Patent Application 12415806
Patent Application
App. No. 12/415,806

DETERMINING AND ANALYZING INTEGRATED CIRCUIT YIELD AND QUALITY

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Patent No.
US None
App. No.
12/415,806
Abstract

Methods, apparatus, and systems for computing, analyzing, and improving integrated circuit yield and quality are disclosed herein. For example, in one exemplary method disclosed herein, information is received from processing test responses of integrated circuits designed for functional use in electronic devices. In this embodiment, the information is indicative of integrated circuit failures observed during testing of the integrated circuits and of possible yield limiting factors causing the integrated circuit failures. Probabilities that one or more of the possible yield limiting factors in the integrated circuits actually caused the integrated circuit failures are determined by statistically analyzing the received information. The probabilities that one or more possible yield limiting factors actually caused the integrated circuit failures are reported. Tangible computer-readable media comprising computer-executable instructions for causing a computer to perform any of the described methods are also disclosed.

Claims (43)

1 .- 44 . (canceled)

45 . A computer-implemented method, comprising:

receiving information indicative of integrated circuit failures observed during testing of multiple integrated circuits and potential defects that may have caused the integrated circuit failures, the potential defects having been extracted and targeted for testing using extraction rules derived from design manufacturing rules;

analyzing the information to determine one or more failure rates associated with one or more of the potential defects; and

reporting the determined failure rates.

46 . The method of claim 45 , wherein the information received comprises one or more of the following: (a) diagnosis results; (b) one or more lists of the potential defects; or (c) information about detection of the potential defects during the testing.

47 . The method of claim 45 , further comprising determining an estimate of the yield of the integrated circuits based at least in part on the determined failure rates.

48 . The method of claim 45 , wherein the integrated circuits comprise a first set of integrated circuits, the method further comprising determining an estimate of the yield of a second set of integrated circuits based at least in part on the determined failure rates.

49 . The method of claim 45 , further comprising determining an estimate of the escape rate of a respective potential defect or of the integrated circuits based at least in part on the determined failure rates.

50 . The method of claim 45 , wherein the integrated circuits comprise a first set of integrated circuits, the method further comprising determining an estimate of the escape rate of a potential defect of a second set of integrated circuits or of the second set of integrated circuits based at least in part on the determined failure rates.

51 . The method of claim 45 , further comprising estimating a yield sensitivity curve for at least one of the design manufacturing rules based at least in part on the determined failure rates.

52 . The method of claim 45 performed repetitively over time, the method further comprising determining production trends based on changes in the determined probabilities observed over time.

53 . The method of claim 45 , further comprising performing one or more of the following based at least in part on the reported probabilities: (a) adjusting one or more design manufacturing rules; (b) adjusting one or more defect extraction rules; or (c) providing recommended modifications for one or more features in the integrated circuits.

54 . The method of claim 53 , wherein one or more features in the integrated circuits are modified based at least in part on the reported probabilities, the method further comprising producing one or more integrated circuits having the modified one or more features.

55 . The method of claim 45 , the diagnostic results are obtained through application of at least one fault dictionary.

56 . The method of claim 55 , wherein the at least one fault dictionary comprises a compressed fault dictionary that uses one or more bit masks to identify potential defects.

57 . The method of claim 45 , wherein the analyzing comprises:

constructing probability models associated with the feature fail rates;

relating the constructed probability models to the diagnostic results received; and

computing estimated feature fail rates using regression analysis.

58 . One or more tangible computer-readable media storing computer-executable instructions for causing a computer to perform a method, the method comprising:

receiving information indicative of integrated circuit failures observed during testing of multiple integrated circuits and potential defects that may have caused the integrated circuit failures, the potential defects having been extracted and targeted for testing using extraction rules derived from design manufacturing rules;

analyzing the information to determine one or more failure rates associated with one or more of the potential defects; and

reporting the determined failure rates.

59 . At least one computer programmed to carry out a method,

the method comprising:

receiving information indicative of integrated circuit failures observed during testing of multiple integrated circuits and potential defects that may have caused the integrated circuit failures, the potential defects having been extracted and targeted for testing using extraction rules derived from design manufacturing rules:

analyzing the information to determine one or more failure rates associated with one or more of the potential defects; and

reporting the determined failure rates.

60 . The one or more tangible computer-readable media of claim 58 , wherein the information received comprises one or more of the following: (a) diagnosis results; (b) one or more lists of the potential defects; or (c) information about detection of the potential defects during the testing.

61 . The one or more tangible computer-readable media of claim 58 , wherein the method further comprises determining an estimate of the yield of the integrated circuits based at least in part on the determined failure rates.

62 . The one or more tangible computer-readable media of claim 58 , wherein the integrated circuits comprise a first set of integrated circuits, and the method further comprises determining an estimate of the yield of a second set of integrated circuits based at least in part on the determined failure rates.

63 . The one or more tangible computer-readable media of claim 58 , wherein the method further comprises determining an estimate of the escape rate of a respective potential defect or of the integrated circuits based at least in part on the determined failure rates.

64 . The one or more tangible computer-readable media of claim 58 , wherein the integrated circuits comprise a first set of integrated circuits, and wherein the method further comprises determining an estimate of the escape rate of a potential defect of a second set of integrated circuits or of the second set of integrated circuits based at least in part on the determined failure rates.

65 . The one or more tangible computer-readable media of claim 58 , wherein the method further comprises estimating a yield sensitivity curve for at least one of the design manufacturing rules based at least in part on the determined failure rates.

66 . The one or more tangible computer-readable media of claim 58 , wherein the method is performed repetitively over time, and the method further comprises determining production trends based on changes in the determined probabilities observed over time.

67 . The one or more tangible computer-readable media of claim 58 , wherein the method further comprises performing one or more of the following based at least in part on the reported probabilities: (a) adjusting one or more design manufacturing rules; (b) adjusting one or more defect extraction rules; or (c) providing recommended modifications for one or more features in the integrated circuits.

68 . The one or more tangible computer-readable media of claim 58 , wherein the diagnostic results are obtained through application of at least one fault dictionary.

69 . The one or more tangible computer-readable media of claim 68 , wherein the at least one fault dictionary comprises a compressed fault dictionary that uses one or more bit masks to identify potential defects.

70 . The one or more tangible computer-readable media of claim 58 , wherein the analyzing comprises:

constructing probability models associated with the feature fail rates;

relating the constructed probability models to the diagnostic results received; and

computing estimated feature fail rates using regression analysis.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2009
From: RAJSKI, JANUSZ; CHEN, GANG; KEIM, MARTIN; TAMARAPALLI, NAGESH; SHARMA, MANISH; TANG, HUAXING
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 022655/0074 →