IP Library Granted Patent US 7,821,338
Granted Patent B2
US 7,821,338 · App. 12/425,790 · Granted Oct 26, 2010

Amplifier current drive reversal

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Quick Facts
Patent No.
US 7,821,338
App. No.
12/425,790
Granted
Oct 26, 2010
Kind
B2
Abstract

A drive current direction between first and second amplifiers can be selected using a received indication of an output current in an at least partially reactive load, and an amplified output signal can be produced using the selected drive current direction and the first and second amplifiers. Further, the first and second amplifiers can be configured to alternate between a pull-up mode and a pull-down mode, each amplifying half of a full wave output signal.

Claims (47)

1. A bridge-tied load (BTL) amplifier system for driving an at least partially reactive load, comprising:

first and second amplifiers configured to receive an input signal and to produce an amplified output signal, each of the first and second amplifiers including an output stage, each of the output stages including:

a pull-up device configured to draw current from a first power rail; and

a pull-down device configured to sink current into a second power rail;

the first and second amplifiers, configured to alternate between a pull-up mode and a pull-down mode, each amplifying substantially half of a full wave output signal; and

digital logic circuitry configured to receive an indication of output current in the load and to select a current drive direction of the first and second amplifiers using the received output current information.

2. The amplifier system of claim 1 , wherein the first and second amplifiers are configured to drive an at least partially reactive load.

3. The amplifier system of claim 1 , wherein the digital logic circuitry is configured to receive the indication of output current in the load, the output current at least partially out of phase with an output voltage in the load.

4. The amplifier system of claim 1 , wherein the pull-up and pull-down devices include n-type devices.

5. The amplifier system of claim 1 , wherein the pull-up device includes a pull-up switch configured to draw current from and hold its output to the first power rail; and

wherein the pull-down device includes a transconductive pull-down device configured to sink a variable current into the second power rail in response to the received input signal.

6. The amplifier system of claim 1 , wherein the pull-up device includes a transconductive pull-up device configured to draw a variable current from the first power rail in response to the received input signal; and

wherein the pull-down device includes a pull-down switch configured to sink current to and hold its output to the second power rail.

7. The amplifier system of claim 1 , wherein the first power rail includes one of a plurality of available power rails;

wherein the second power rail includes one of the plurality of available power rails; and

wherein the digital logic circuitry is configured to receive an indication of a target output voltage in a load and to select the first and second power rails for each of the first and second amplifiers from the plurality of available power rails using the received output voltage information.

8. The amplifier system of claim 7 , wherein the digital logic circuitry is configured to select the first and second power rails for each of the first and second amplifiers using the received target output voltage information to minimize a voltage drop between the selected first and second power rails and the received target output voltage information.

9. A bridge-tied load (BTL) amplifier system, responsive to both load voltage and load current, for driving an at least partially reactive load, comprising:

first and second amplifiers configured to receive an input signal and to produce an amplified output signal, each of the first and second amplifiers including an output stage, each of the output stages including:

a pull-up switch configured to draw current from and hold its output to one of a plurality of available power rails; and

a transconductive pull-down device configured to sink a variable current into one of the plurality of available power rails in response to the input signal;

the first and second amplifiers, configured to alternate between a switched pull-up mode and a variable pull-down mode, each amplifying substantially half of a full wave output signal; and

digital logic circuitry configured to receive an indication of an output current and a target output voltage in the load, to select a current drive direction of the first and second amplifiers using the received output current information, and to select the power rails for each of the first and second amplifiers from the plurality of available power rails using the received output voltage information.

10. The amplifier system of claim 9 , wherein the first and second amplifiers are configured to drive an at least partially reactive load.

11. The amplifier system of claim 9 , wherein the digital logic circuitry is configured to receive the indication of output current and the target output voltage in the load, the output current at least partially out of phase with the target output voltage.

12. The amplifier system of claim 9 , wherein the pull-up and pull-down devices include n-type devices.

13. The amplifier system of claim 9 , wherein the digital logic circuitry is configured to select the power rails for each of the first and second amplifiers using the received output voltage information to minimize a voltage drop between the selected power rails and the received target output voltage information.

14. A method of driving an at least partially reactive load, comprising:

receiving an input signal at first and second amplifiers;

receiving an indication of an output current in the load;

selecting a drive current direction between the first and second amplifiers using the received output current information; and

producing an amplified output signal using the selected drive current direction and the first and second amplifiers, the first and second amplifiers, configured to alternate between a pull-up mode and a pull-down mode, each amplifying half of a full wave output signal.

15. The method of claim 14 , wherein the producing the amplified output signal includes producing an amplified output signal to drive an at least partially reactive load.

16. The method of claim 14 , wherein the receiving the indication of the output current in the load includes receiving an indication of an output current at least partially out of phase with an output voltage in the load.

17. The method of claim 14 , including:

drawing current for each of the first and second amplifiers from a first power rail using pull-up devices and sinking current for each of the first and second amplifiers to a second power rail using pull-down devices.

18. The method of claim 17 , wherein the drawing and sinking the current for the first and second amplifiers includes drawing current using n-type pull-up devices and sinking current using n-type pull-down devices.

19. The method of claim 17 , wherein the drawing the current for the first and second amplifiers includes using a pull-up switch configured to draw current from and hold its output to the first power rail; and

wherein the sinking the current for the first and second amplifiers includes using a transconductive pull-down device configured to sink a variable current into the second power rail in response to the received input signal.

20. The method of claim 17 , wherein the drawing the current for the first and second amplifiers includes using a transconductive pull-up device configured to draw a variable current from the first power rail in response to the received input signal; and

wherein the sinking the current for the first and second amplifiers includes using a pull-down switch configured to sink current into and hold its output to the second power rail.

21. The method of claim 14 , including:

drawing current for each of the first and second amplifiers from one of a plurality of available power rails using pull-up devices and sinking current for each of the first and second amplifiers from one of the plurality of available power rails using pull-down devices.

22. The method of claim 21 , including:

receiving an indication of a target output voltage in a load; and

selecting the power rails for each of the first and second amplifiers from the one of the plurality of available power rails using the received target output voltage information.

23. The method of claim 22 , wherein the selecting the power rails for each of the first and second amplifiers includes to minimize a voltage drop between the selected first and second power rails and the received target output voltage information.

Assignments (7)
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 058871, FRAME 0799 Recorded Jun 23, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 065653/0001 →
RELEASE OF SECURITY INTEREST IN PATENTS RECORDED AT REEL 040075, FRAME 0644 Recorded Jun 22, 2023
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC; FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 064070/0536 →
SECURITY INTEREST Recorded Nov 12, 2021
From: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 058871/0799 →
RELEASE OF SECURITY INTEREST Recorded Oct 28, 2021
From: DEUTSCHE BANK AG NEW YORK BRANCH
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 057969/0206 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2021
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
Reel/Frame 057694/0374 →
PATENT SECURITY AGREEMENT Recorded Sep 19, 2016
From: FAIRCHILD SEMICONDUCTOR CORPORATION
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 040075/0644 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 8, 2009
From: LLEWELLYN, WILLIAM D.
To: FAIRCHILD SEMICONDUCTOR CORPORATION
Reel/Frame 022930/0711 →