Secure time element
View Patent ↗Apparatus comprising a secure time element comprising a timing device that outputs to a plurality of delay devices, wherein the delay devices have characteristic delay times which are alterable as a result of a tampering attempt to tamper therewith, and wherein a characteristic delay time of one of the delay devices changes differently from another one of the delay devices as a result of the tampering attempt.
1. A method for detecting a tampering attempt comprising a stimulus applied by a tamperer, the method comprising:
providing a secure time element comprising:
a timing device that provides an output;
a plurality of delay devices arranged in parallel, wherein:
each of said delay devices receives the output;
each of said delay devices has a characteristic delay time which changes in reaction to said stimulus; and
said characteristic delay time of one of said delay devices changes differently from said characteristic delay time of another one of said delay devices in reaction to said stimulus;
receiving a signal from each of said delay devices; and
processing sensed delay times of said delay devices and producing a result indicative of whether a tampering attempt has occurred based, at least in part, on: said signal received from each of said delay devices; and said characteristic delay times of said delay devices.
2. Apparatus resistant to a tampering attempt comprising a stimulus applied by a tamperer, the apparatus comprising:
a secure time element comprising:
a timing device that provides an output;
a plurality of delay devices arranged in parallel, wherein:
each of said delay devices receives the output;
each of said delay devices has a characteristic delay time which changes in reaction to said stimulus; and
said characteristic delay time of one of said delay devices changes differently from said characteristic delay time of another one of said delay devices in reaction to said stimulus; and
a processor in operative association with said plurality of delay devices and receiving a signal from each of said delay devices, said processor being operative to process sensed delay times of said delay devices and to produce a result indicative of whether a tampering attempt has occurred based, at least in part, on: said signal received from each of said delay devices; and said characteristic delay times of said delay devices.
3. Apparatus according to claim 2 , wherein said secure time element is associated with a smart card.
4. Apparatus according to claim 3 , wherein said smart card comprises descrambling circuitry operative to enable descrambling of television signals.
5. Apparatus according to claim 2 , wherein said timing device comprises an oscillator.
6. Apparatus according to claim 2 , wherein said delay devices comprise at least one of a delay line, a logic buffer, a wire trace, a capacitor, a resistor, and an inductor.
7. Apparatus according to claim 2 , wherein the characteristic delay times of said delay devices vary as a function of said stimulus, and said stimulus comprises at least one of temperature change, humidity change, mechanical stress, and application of electromagnetic wave radiation.
8. Apparatus according to claim 2 , wherein said processor is pre-programmed with said characteristic delay times of said delay devices.
9. A system for communicating with a user system, the system comprising:
a smart card communicable with said user system; and
a secure time element comprising:
a timing device that provides an output;
a plurality of delay devices arranged in parallel, wherein:
each of said delay devices receives the output;
each of said delay devices has a characteristic delay time which changes in reaction to said stimulus; and
said characteristic delay time of one of said delay devices changes differently from said characteristic delay time of another one of said delay devices in reaction to said stimulus; and
a processor in operative association with said plurality of delay devices and receiving a signal from each of said delay devices, said processor being operative to process sensed delay times of said delay devices and to produce a result indicative of whether a tampering attempt has occurred based, at least in part, on: said signal received from each of said delay devices; and said characteristic delay times of said delay devices,
wherein the secure time element is operatively associated with the smart card.
10. The system according to claim 9 , wherein said secure time element is disposed in said smart card.
11. The system according to claim 9 , wherein said user system establishes a starting time and an ending time of a user event associated with said user system.
12. The system according to claim 11 , wherein said user system establishes the starting time and ending time by means of time stamp messages sent to said smart card, wherein a first time stamp message is sent at a first time indicating permission to perform a user action and comprising time information indicating a starting time of the user event, and a second time stamp message is sent at a second time indicating prevention of performing a user action and comprising time information indicating a finishing time of the user event.
13. The system according to claim 9 , wherein said user system comprises a gambling system with which is associated a gambling event.
14. The system according to claim 9 , wherein said processor is pre-programmed with said characteristic delay times of said delay devices.
15. Apparatus comprising:
smart card means for communicating with a user system; and
means for secure timing comprising:
a timing device that provides an output;
a plurality of delay devices arranged in parallel, wherein:
each of said delay devices receives the output;
each of said delay devices has a characteristic delay time which changes in reaction to said stimulus; and
said characteristic delay time of one of said delay devices changes differently from said characteristic delay time of another one of said delay devices in reaction to said stimulus; and
a processor in operative association with said plurality of delay devices and receiving a signal from each of said delay devices, said processor being operative to process sensed delay times of said delay devices and to produce a result indicative of whether a tampering attempt has occurred based, at least in part, on: said signal received from each of said delay devices; and said characteristic delay times of said delay devices,
wherein the means for secure timing is operatively associated with the smart card means.
16. Apparatus according to claim 15 , wherein said processor is pre-programmed with said characteristic delay times of said delay devices.