Planarized sacrificial layer for MEMS fabrication
View Patent ↗A method of forming a device is provided. The method includes providing a substrate, forming a sacrificial layer over the substrate, and forming an field layer around the sacrificial layer. After formation, both the sacrificial layer and the field layer are planarized. A component is then formed over the planarized sacrificial layer and the planarized field layer. The component has a first electrode and a second electrode and a single crystal wafer disposed between the first electrode and the second electrode. The component also includes anchors disposed substantially over the field layer. Once the component is formed, the sacrificial layer is released with an etchant having a selectivity for the sacrificial layer such that a cavity is formed beneath the component. The cavity allows free movement component within the cavity during operation of the device. In addition, the etchant does not release the field layer and the component such that the field layer remains below the anchors.
1. A device formed by a process comprising:
providing a substrate;
forming a sacrificial layer over the substrate;
forming a field layer around the sacrificial layer;
planarizing the sacrificial layer and the field layer;
forming a component over the planarized sacrificial layer and the planarized field layer, the component having a first electrode and a second electrode and a single crystal wafer disposed between the first electrode and the second electrode, wherein the component includes anchors disposed substantially over the field layer; and
releasing the sacrificial layer with an etchant having a selectivity for the sacrificial layer, thereby forming a cavity beneath the component, where the component freely moves within the cavity during operation of the device, wherein the etchant does not release the field layer and the component such that the field layer remains below and in contact with the anchors and the anchors remain stationary during operation of the device.
2. The device of claim 1 , wherein the single crystal wafer is a piezoelectric material.
3. The device of claim 2 wherein the single crystal wafer is lithium tantalate.
4. The device of claim 2 , wherein the single crystal wafer is lithium niobate.
5. The device of claim 1 , wherein the second electrode functions as a hard mask during the formation of the component.
6. The device of claim 5 , wherein the step of forming the component further comprises patterning the first electrode and the single crystal wafer such that the first electrode and the single crystal wafer are self-aligned.
7. The device of claim 1 , wherein the field layer is formed from a material different from the sacrificial layer.
8. The device of claim 1 , wherein the first electrode and the second electrode are formed from a material different from the sacrificial layer.
9. The device of claim 1 , wherein the sacrificial material is silicon.
10. The device of claim 9 , wherein the first electrode and the second electrode are formed from gold.
11. The device of claim 10 , wherein the etchant is Potassium Hydroxide (KOH).
12. The device of claim 1 , wherein the field layer is an oxide layer.
13. The device of claim 1 , wherein the sacrificial material is Silicon.
14. The device of claim 13 , wherein the first electrode and the second electrode are formed from Chromium.
15. The device of claim 14 , wherein the etchant is Xenon Difluoride (XeF 2 ).
16. The device of claim 1 , wherein the sacrificial material is Aluminum.
17. The device of claim 16 , wherein the first electrode and the second electrode are formed from Chromium.
18. The device of claim 17 , wherein the etchant is dilute aqua regia.