Solid state imaging device capable of parallel reading of data from a plurality of pixel cells
View Patent ↗A solid state imaging device has a pixel region composed of a matrix of pixel cells each including a photodiode and a charge storage portion. First and second output signal lines are in parallel and adjacent to both the charge storage portions of a first pixel cell and a second pixel cells that are adjacent on a same column. A signal voltage of a signal charge in the charge storage portion of the first pixel cell is output to the first output signal line, whereas a signal voltage of a signal charge in the charge storage portion of the second pixel cell is output to the second output signal line. The respective outputs to the first and second output signal lines are processed in parallel. A conductive layer is disposed between the charge storage portion of the first pixel cell and the second output signal line to suppress capacitive coupling.
1. A solid state imaging device having a pixel region in which a plurality of pixel cells are disposed in a matrix, the solid state imaging device comprising:
a plurality of photodiodes each disposed in a different one of the pixel cells and operable to perform photoelectric conversion; and
a plurality of charge storage portions each disposed in a different one of the pixel cells and operable to store a signal charge generated by a corresponding one of the photodiodes, wherein
the pixel cells include a first pixel cell and a second pixel cell that are adjacent to each other on a same column,
the solid state imaging device further comprises:
a first output signal line and a second output signal line disposed in parallel to each other and adjacent to both the charge storage portions of the first and second pixel cells; and
a conductive layer disposed between the charge storage portion of the first pixel cell and the second output signal line to suppress capacitive coupling therebetween,
a signal voltage indicative of a signal charge stored in the charge storage portion of the first pixel cell is output to the first output signal line,
a signal voltage indicative of a signal charge stored in the charge storage portion of the second pixel cell is output to the second output signal line, and
the output to the first output signal line is made in parallel with the output to the second output signal line.
2. The solid state imaging device according to claim 1 , wherein
the conductive layer is maintained at a fixed potential.
3. The solid state imaging device according to claim 1 , wherein
the conductive layer is grounded.
4. The solid state imaging device according to claim 1 , wherein
the conductive layer is connected to the first output signal line.
5. The solid state imaging device according to claim 4 , further comprising:
a second conductive layer disposed between the charge storage portion of the second pixel cell and the first output signal to suppress capacitive coupling therebetween, wherein
the second conductive layer is connected to the second output signal line.
6. The solid state imaging device according to claim 1 , further comprising:
an insulating film; and
a pair of contact plugs each disposed in a different one of the first and second pixel cells and to extend through the insulating film, wherein
in a direction intersecting a plane along which the pixel cells are disposed, the first and second output signal lines are (i) located above the charge storage portions of the first and second pixel cells via the insulating film, and (ii) each connected to the charge storage portion of a corresponding one of the first and second pixel cells via a corresponding one of the contact plugs, and
the first and second pixel cells are identical in plan view, except for the locations of the contact plugs.
7. The solid state imaging device according to claim 6 , wherein
the charge storage portions of the first and second pixel cells each have a line portion that extends in parallel to both the first and second output signal lines, and
with respect to an imaginary line extending in parallel to the line portions, the contact plug connecting the first output signal line to the charge storage portion of the first pixel cell is disposed in symmetric relation to the contact plug connecting the second output signal line to the charge storage portion of the second pixel cell.
8. The solid state imaging device according to claim 1 , wherein
the first and second pixel cells each include, in addition to the photodiode and the charge storage portion:
a transfer transistor operable to transfer the signal charge generated by the photodiode to the charge storage portion, based on a transfer control signal received;
a reset transistor operable to reset a potential of the charge storage portion, based on a reset control signal received; and
an amplification transistor operable to amplify the signal charge transferred to the charge storage portion and output the amplified signal charge to a corresponding one of the first and second output signal lines.
9. The solid state imaging device according to claim 8 , wherein
each photodiode disposed in the first and second pixel cells comprises two photodiodes, and
the first and second pixel cells share the one amplification transistor and the one reset transistor.
10. The solid state imaging device according to claim 8 , wherein
the transfer control signal input to the transfer transistor is raised in multiples steps to multiple voltage levels before reaching to an ON state.