IP Library Granted Patent US 8,537,878
Granted Patent B2
US 8,537,878 · App. 12/430,099 · Granted Sep 17, 2013

Spread-spectrum codes generation

Inventor: Ismail Lakkis (San Diego, CA)
Assignee: Adeptence, LLC
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Quick Facts
Patent No.
US 8,537,878
App. No.
12/430,099
Granted
Sep 17, 2013
Kind
B2
Abstract

A method for communicating comprises generating at least one spreading code from a preferred Golay generator and/or a preferred generalized Golay generator. The preferred generalized Golay generator may comprise a plurality of preferred Golay generators. The outputs of the preferred Golay generator are logic 0 and 1. Each stage of the preferred Golay generator may comprise a single basic storage unit, such as a Flip-Flop. Generalized Golay codes comprise pseudo-complementary sequences having code lengths that differ from Golay complementary sequences and are characterized by low autocorrelation sidelobes relative to the autocorrelation peak.

Claims (151)

1. A method for communication, comprising:

generating at least one spreading code using at least one Golay generator comprising M stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder and a subtractor spreading at least a portion of a data stream with the at least one spreading code; and

transmitting the spread data stream.

2. The method of claim 1 , wherein the at least one spreading code is a generalized Golay code formed of K constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

where K≧2, and where a k th constituent Golay code has length 2 M k .

3. The method of claim 1 , wherein each memory component comprises a number of delay elements, and wherein the total number of delay elements in the Golay generator is less than N−1, where N is the Golay code length.

4. The method of claim 3 , wherein the total number of delay elements is M, wherein the seed vector is of length M, and wherein N=2 M .

5. The method of claim 1 , wherein the Golay generator further comprises an M-bit counter and an M-bit control unit, and wherein an m th bit of the counter provides a clock signal or an enable signal of a corresponding m th stage, and wherein an m th bit output by the control unit provides the m th gating signal.

6. A method for communication, comprising:

receiving a spread data stream;

generating at least one spreading code using at least one Golay generator comprising M stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder and a subtractor; and

despreading at least a portion of the received data stream with the at least one spreading code.

7. The method in claim 6 , wherein the at least one spreading code is a generalized Golay code formed of K constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

where K≧2, and where k th constituent Golay code has length 2 M k .

8. The method of claim 6 , wherein each memory component comprises a number of delay elements, and wherein the total number of delay elements in the Golay generator is less than N−1, where N is the Golay code length.

9. The method of claim 8 , wherein the total number of delay elements is M, wherein the seed vector is of length M, and wherein N=2 M .

10. The method of claim 6 , wherein the Golay generator further comprises an M-bit counter and an M-bit control unit, and wherein an m th bit of the counter provides a clock signal or an enable signal of a corresponding m th stage, and wherein an m th bit output by the control unit provides the m th gating signal.

11. An apparatus for communications, comprising:

a generator for generating at least one spreading code using at least one Golay generator comprising M stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder and a subtractor;

a spreader for spreading at least a portion of a data stream with the at least one spreading code; and

a transmitter for transmitting the spread data stream.

12. The apparatus of claim 11 , wherein the at least one spreading code comprises is a generalized Golay code formed of K constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

where K≧2, and where a k th constituent Golay code has length 2 M k .

13. The apparatus of claim 11 , wherein the each memory component comprises a number of delay elements, and wherein the total number of delay elements in the Golay generator is less than N−1, where N is the Golay code length.

14. The apparatus of claim 13 , wherein the total number of delay elements is M, where N=2 M is the Golay code length.

15. The apparatus of claim 11 , wherein the Golay generator further comprises an M-bit counter and an M-bit control unit, and wherein an m th bit of the counter provides a clock signal or an enable signal of a corresponding m th stage, and wherein an m th bit output by the control unit provides the m th gating signal.

16. The apparatus of claim 11 , wherein the first multiplier is implemented using an XOR logic gate, and wherein the second multiplier is implemented using an AND logic gate.

17. An apparatus for communication, comprising:

a receiver for receiving a spread data stream;

a generator for generating at least one spreading code using at least one Golay generator comprising M stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder and a subtractor; and

a despreader for despreading at least a portion of a received data stream with the at least one spreading code.

18. The apparatus of claim 17 , wherein the spreading code comprises a generalized Golay code formed of K constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

where K≧2, and where a k th constituent Golay code has length 2 M k .

19. The apparatus of claim 17 , wherein each memory component comprises a number of delay elements, and wherein the total number of delay elements in the Golay generator is less than N−1, where N is the Golay code length.

20. The apparatus of claim 17 , wherein the total number of delay elements is M, where N=2 M is the Golay code length.

21. The apparatus of claim 17 , wherein the Golay generator further comprises an M-bit counter and an M-bit control unit, and wherein an m th bit of the counter provides a clock signal or an enable signal of a corresponding m th stage, and wherein an m th bit output by the control unit provides the m th gating signal.

22. The apparatus of claim 17 , wherein the first multiplier is implemented using an XOR logic gate, and wherein the second multiplier is implemented using an AND logic gate.

23. A method for communication, comprising:

generating at least one generalized Golay code by concatenating constituent Golay codes, the generalized Golay code having a length N determined by

N

=

k

=

1

K

2

M

k

,

where K≧2, the number of constituent Golay codes, each k th constituent Golay code has length 2 M k , and N does not equal any Golay complementary sequence length; and

spreading at least a portion of a data stream with the at least one generalized Golay code; and

transmitting the spread data stream.

24. A method for communication, comprising:

receiving a spread data stream;

generating at least one generalized Golay code by concatenating constituent Golay codes, the at least one generalized Golay code having a length N determined by

N

=

k

=

1

K

2

M

k

,

where K≧2, is the number of constituent Golay codes, each k th constituent Golay code has length 2 M k , and N does not equal any Golay complementary sequence length; and

despreading at least a portion of the received data stream with the at least one generalized Golay code.

25. An apparatus for communications, comprising:

a generator for generating at least one generalized Golay code formed of concatenated constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

,

where K≧2,is the number of constituent Golay codes, each k th constituent Golay code has length 2 M k , and N does not equal any Golay complementary sequence length;

a spreader for spreading at least a portion of a data stream with the at least one generalized Golay code; and

a transmitter for transmitting the spread data stream.

26. An apparatus for communication, comprising:

a receiver for receiving a spread data stream;

a generator for generating at least one generalized Golay code formed of concatenated constituent Golay codes and having a length N determined by

N

=

k

=

1

K

2

M

k

,

where K≧2, is the number of constituent Golay codes, each k th constituent Golay code has length 2 M k , and N does not equal any Golay complementary sequence length; and

a despreader for despreading at least a portion of the received data stream with the at least one generalized Golay code.

27. The apparatus of claim 25 , wherein the generator comprises K Golay generators, each Golay generator comprising M k stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder, and a subtractor.

28. The apparatus of claim 26 , wherein the generator comprises K Golay generators, each Golay generator comprising M k stages, each stage comprising a memory component, a first multiplier that multiplies the output of the memory component with an m th seed element of a seed vector, a second multiplier that multiplies the output signal of the first multiplier with an m th gating signal, an adder, and a subtractor.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 4, 2015
From: ADEPTENCE, LLC
To: NANT HOLDINGS IP, LLC
Reel/Frame 035559/0156 →
CHANGE OF NAME Recorded Sep 11, 2012
From: HIPO, LLC
To: ADEPTENCE, LLC
Reel/Frame 028939/0107 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 9, 2012
From: TENSORCOM, INC.
To: HIPO, LLC
Reel/Frame 028183/0706 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2010
From: LAKKIS, ISMAIL
To: TENSORCOM, INC.
Reel/Frame 024355/0152 →
Continuity (1)
Related Publication 20100272158A1 · Oct 28, 2010