DC coupled driver with active termination
View Patent ↗A DC coupled driver is described for modulating a vertical cavity surface emitting laser at high speeds with active termination. High speed and low total power dissipation is achieved by improving the driver immunity to pulse reflections, which can arise due to impedance mismatch between the driver output impedance and the VCSEL impedance. The rise and fall times of the driver may be adjusted for particular applications. The driver may be fabricated using a choice of bipolar, NMOS and PMOS technologies.
1. A DC-coupled driver for driving a vertical cavity surface emitting laser (VCSEL) diode comprising:
a first positive voltage supply for providing a supply voltage to the driver during operation;
a ground rail for providing a current return path to the first positive voltage supply;
a differential input stage for receiving data and complementary data signals from a signal source, the differential input stage comprising a first and a second transistor, a first and a second output terminal, each connected to the first and a second transistor, respectively, and a modulation current source for biasing the first and second transistors;
a termination resistor having a first and a second terminal;
a first current source connected to the first terminal on the termination resistor for providing a current bias to at least one of the VCSEL diode and the first transistor of the differential input stage;
a low frequency differential input feedback amplifier for sensing a voltage drop across the termination resistor, and operational to maintain a predetermined voltage drop across the termination resistor;
wherein the VCSEL diode is connected directly to the termination resistor for actively controlling a driving voltage on the VCSEL diode;
a shunt feedback transimpedance amplifier comprising a bias diode for providing a bias voltage offset, a third transistor for providing gain, and a feedback resistor;
a second current source connected to the second terminal on the termination resistor for providing a current bias to the second transistor of the differential input stage; and
an inverting voltage to current converter having an output terminal that is coupled to an input of the shunt feedback transimpedance amplifier;
wherein the low frequency feedback amplifier further comprises:
a first operational amplifier having an inverting input terminal, a non-inverting input terminal, and an output that is connected to an input of the inverting voltage to current converter;
a bypass capacitor connecting the non-inverting input terminal to the ground rail;
a first input resistor connecting the non-inverting input terminal to the first terminal on the termination resistor; a second input resistor connecting the inverting input terminal to the second terminal on the termination resistor;
an integrating capacitor connecting the inverting input terminal to the output terminal of the first operational amplifier; and
wherein the first output of the differential input stage is connected to the first terminal on the termination resistor; and the second output of the differential input stage is connected to the input of the shunt feedback transimpedance amplifier.
2. The DC-coupled driver of claim 1 , wherein the first and second transistors of the differential input stage comprise PMOS field effect transistors (FETs) with source terminals coupled together to the modulation current source, the modulation current source drawing current from the first positive supply rail; with gate terminals comprising data and complementary data inputs; and with drain terminals comprising the first and second output terminals of the differential input stage, respectively;
wherein an anode terminal of the bias diode is connected to the first positive supply rail;
wherein the third transistor comprises a PMOS field effect transistor (FET) with an source terminal coupled to a cathode of the bias diode, with a drain terminal coupled to the second terminal on the termination resistor and with a gate terminal connected to the drain terminal through the feedback resistor, the gate terminal comprising the input of the shunt feedback transimpedance amplifier; and
wherein the first and second current source draws current from the ground rail.
3. The DC-coupled driver of claim 2 , wherein the VCSEL diode has a cathode terminal connected to the first terminal on the termination resistor and an anode terminal connected to the first positive voltage supply.
4. The DC-coupled driver of claim 2 , further comprising
a second operational amplifier having an inverting and a non-inverting input terminal;
a decoupling capacitor connected from an output terminal of the second operational amplifier to the first positive supply rail;
a second feedback resistor connected between the inverting input terminal of the second operational amplifier and the first terminal of the termination resistor; and
a bias resistor with a center tap connected between the first positive supply rail and the ground rail, the center tap being connected to the non-inverting input terminal of the second operational amplifier;
wherein the second operational amplifier is supplied from a 3 volt supply; and
wherein the VCSEL diode has an anode terminal connected to the output terminal of the second operational amplifier and a cathode terminal connected to the first terminal of the termination resistor.
5. The DC-coupled driver of claim 4 , further comprising:
a fourth PMOS field effect transistor with a gate terminal coupled to the gate terminal of the first transistor, with a source terminal coupled to the source terminal of the first transistor and a drain terminal coupled to the drain terminal of the first transistor;
a fifth PMOS field effect transistor with a gate terminal coupled to the gate terminal of the second transistor, with a source terminal coupled to the source terminal of the second transistor and a drain terminal coupled to the ground rail;
wherein the gate width of the fifth transistor is greater than the gate width of the second transistor.
6. The DC-coupled driver of claim 5 , wherein the gate width of the fifth transistor is greater than the gate width of the second transistor by a factor of at least 10.