Methods and apparatus for characterizing adaptive clocking domains in multi-domain networks

1. A method for clock domain management, comprising:

receiving a first data packet traveling across a first circuit emulation service (“CES”) circuit;

obtaining a clock domain hierarchy having a CES section listing a plurality of CES circuits and a clock section containing a list of multiple unique clock frequencies from a storage location;

comparing the first CES circuit with circuits listed in the CES section until a match is found;

identifying a first clock frequency associated with a circuit that matches with the first CES circuit in the clock domain hierarchy; and

assigning the first clock frequency to a packet processing unit for processing the first data packet.

2. The method of claim 1 , further comprising selecting a first trial clock domain to the packet processing unit for processing the data packet when the clock domain hierarchy does not contain the first clock frequency.

3. The method of claim 2 , further comprising:

processing the data packet stored in a jitter buffer utilizing the first trial clock domain; and

monitoring usage rate of the jitter buffer.

4. The method of claim 3 , further comprising:

dedicating the first trial clock domain to the first clock frequency for the first CES circuit when the usage rate of the jitter buffer falls within a predefined optimum range of buffer usage; and

updating the clock domain hierarchy by inserting information relating to the first clock frequency and the first CES circuit.

5. The method of claim 3 , further comprising:

selecting a second trial clock domain to replace the first trial clock domain when the usage rate of the jitter buffer for the first trial clock domain falls outside of a predefined optimum range of buffer usage;

processing the data packet stored in the jitter buffer utilizing the second trial clock domain; and

monitoring the usage rate of the jitter buffer for the second trial clock domain.

6. The method of claim 5 , further comprising:

dedicating the second trial clock domain to the first clock frequency for the first CES circuit when the usage rate of the jitter buffer falls within a predefined optimum range of jitter buffer usage; and

updating the clock domain hierarchy by inserting information relating to the first clock frequency and the first CES circuit.

7. The method of claim 1 , wherein receiving a first data packet traveling across a first CES circuit includes obtaining one or more CES data frames traveling between a circuit switching network and a packet switching network.

8. The method of claim 1 , wherein obtaining a clock domain hierarchy includes fetching a database having a table listing a plurality of clock domains associated with the plurality of CES circuits.

9. The method of claim 8 , wherein identifying a first clock frequency further includes searching through the table to identify a corresponding clock domain associated with the first CES circuit.

10. A method for providing a clock domain, comprising:

receiving a packet stream traveling across a first circuit emulation service (“CES”) circuit and storing at least a portion of the packet stream in a jitter buffer;

comparing the first CES circuit with each of a plurality of known CES circuits listed in a CES column of a clock domain hierarchy to determine whether the first CES circuit is listed in the clock domain hierarchy and identifying a first clock domain associated with the first CES circuit from a clock column of the clock domain hierarchy if one of the plurality of known CES circuits matches with the first CES circuit;

fetching the first clock domain from a clock domain hierarchy in a storage location in accordance with the first CES;

recovering a first clock domain in response to the data packet and the jitter buffer when the first CES circuit is not found in the plurality of known CES circuits of the clock domain hierarchy; and

updating the clock domain hierarchy in accordance with recovered clock domain associated with the first CES circuit for future references.

11. The method of claim 10 , further comprising processing at least the portion of the packet stream stored in the jitter buffer utilizing the first clock domain.

12. The method of claim 10 , wherein fetching the first clock domain from a clock domain hierarchy further includes:

obtaining the clock domain hierarchy from a storage location; and

searching the first clock domain in the clock domain hierarchy in accordance with the first CES circuit.

13. The method of claim 10 , wherein recovering a first clock domain in response to the data packet includes:

selecting a first trial clock domain to process the packet stream; and

monitoring buffer usage of the jitter buffer.

14. The method of claim 13 , further includes replacing the first trial clock domain with a second trial clock domain in response to the buffer usage of the jitter buffer.

15. The method of claim 10 , wherein recovering a first clock domain in response to the data packet and a jitter buffer further includes replicating the packet stream into a plurality of replicated packet streams.

16. The method of claim 15 , further includes forwarding the plurality of replicated packet streams to a plurality of jitter buffers.

17. A method for providing a clock domain comprising:

receiving a packet stream traveling across a first circuit emulation service (“CES”) circuit and storing at least a portion of the packet stream in a jitter buffer;

fetching a first clock domain from a clock domain hierarchy in accordance with the first CES circuit when the first clock domain is found in the clock domain hierarchy;

recovering a first clock domain in response to the data packet and the jitter buffer when the clock domain hierarchy does not contain the first clock domain, wherein recovering a first clock domain further includes,

replicating the packet stream into a plurality of replicated packet streams;

forwarding the plurality of replicated packet streams to a plurality of jitter buffers;

applying a unique clock domain to each of the plurality of jitter buffers for data processing;

monitoring usage rates of the plurality of jitter buffers when the jitter buffers are running in parallel; and

identifying a clock frequency having a usage rate fall within a predefined optimum range of usage rate; and

updating the clock domain hierarchy for future references.

18. The method of claim 10 , wherein updating the clock domain hierarchy includes:

dedicating a clock frequency to the first clock domain for the first CES circuit when the usage rate of the jitter buffer falls within a predefined optimum range of buffer usage; and

updating the clock domain hierarchy by inserting information relating to the first clock frequency and the first CES circuit.

19. A network system, comprising:

a network database residing in a node and configured to contain a clock domain hierarchy, wherein the clock domain hierarchy includes a circuit emulation service (“CES”) column listing a plurality of known CES circuits and a clock column containing a plurality of clock domains have multiple different clock frequencies; and

a clock domain management device configured to compare a first CES circuit with the CES circuits listed in the CES column until a match is found in response to a data packet traveling across the first CES circuit;

wherein the clock domain management device includes:

a circuit identifier coupled to the network database and configured to look up a first clock frequency associated with a circuit that matches with the first CES circuit in the clock domain; and

a clock selector coupled to the circuit identifier and configured to assign the first clock frequency to a packet processing unit for processing the data packet.

20. The system of claim 19 , wherein the circuit identifier is further configured to select a first trial clock domain to the packet processing unit for processing the data packet when the clock domain hierarchy does not contain the first clock frequency.