IP Library Granted Patent US 8,634,263
Granted Patent B2
US 8,634,263 · App. 12/433,330 · Granted Jan 21, 2014

Integrated circuit having memory repair information storage and method therefor

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Quick Facts
Patent No.
US 8,634,263
App. No.
12/433,330
Granted
Jan 21, 2014
Kind
B2
Abstract

A storage unit on an integrated circuit stores information that identifies a circuit on the integrated circuit, a selected operating condition, and a required operating configuration for the circuit for the selected operating condition. The manner of operating the circuit is changed to the required operating configuration in response to an operating condition of the circuit changing to the selected operating condition. This allows for efficiently identifying the few circuits that do not meet specified requirements based on a reduction in, for example, operating voltage, and altering their operation in order to meet the specified requirements relative to the reduced operating voltage without having to do so for the vast majority of the circuits that are able to meet the requirements at the lowered operating voltage.

Claims (39)

1. A method, comprising:

storing in a storage unit on an integrated circuit information that identifies an analog circuit on the integrated circuit, a selected power supply voltage, and a required operating configuration comprising tuning parameters for the analog circuit, wherein the selected power supply voltage is selected from a first voltage below which the analog circuit may fail to operate reliably and a second voltage above which the analog circuit may fail to operate reliably; and

changing the manner of operating the analog circuit with the required operating configuration in response to detecting that a power supply voltage supplied to the analog circuit is below the selected power supply voltage when the selected power supply voltage is the first voltage, or in response to detecting that the power supply voltage supplied to the analog circuit is above the selected power supply voltage when the selected power supply voltage is the second voltage.

2. The method of claim 1 , further comprising:

testing the circuit to identify the selected power supply voltage as an operating voltage at which the circuit fails to operate according to a predetermined requirement; and

identifying the required operating configuration as conditions under which the circuit will meet the predetermined requirement at the selected power supply voltage.

3. The method of claim 1 , wherein:

the step of storing is further characterized by the storage unit comprising a one time programmable memory.

4. The method of claim 1 , wherein:

the step of storing is further characterized by the storage unit comprising a non-volatile memory.

5. A method, comprising:

storing, in a storage unit on an integrated circuit, information that identifies a circuit on the integrated circuit, a selected operating condition, and a required operating configuration comprising information for the circuit for the selected operating condition, wherein the step of storing is further characterized by the circuit comprising a memory; and

changing the manner of operating the circuit with the required operating configuration in response to detecting the selected operating condition, wherein the step of changing is further characterized by the required operating configuration as comprising one of a group consisting of enabling a write assist and enabling a read assist.

6. The method of claim 5 , wherein the step of changing is further characterized as a write assist, wherein the write assist comprises one of a group consisting of adjusting bit cell supply voltage, adjusting word line voltage, and adjusting bit line voltage.

7. The method of claim 5 , wherein the step of changing is further characterized as a read assist, wherein read assist comprises one of a group consisting of adjusting bit cell supply voltage, adjusting bit line voltage, and adjusting word line voltage.

8. The method of claim 1 , wherein the step of storing is further characterized as storing a magnitude of adjustment.

9. The method of claim 1 , further comprising:

storing in the storage unit circuit information that identifies a second circuit on the integrated circuit, a selected voltage from among at least the three voltages, and a required operating configuration for the second circuit for the selected voltage; and

changing the manner of operating the second circuit to the required operating configuration for the second circuit in response to an operating voltage of the second circuit changing to the selected voltage.

10. The method of claim 9 , wherein:

the step of storing in the storage unit circuit information that identifies a second circuit is further characterized by the second circuit comprising one of a group consisting of a row and a column in a memory; and

the step of changing the manner of operating the second circuit is further characterized by the required operating configuration for operating the second circuit comprising one of a group consisting of enabling a write assist and enabling a read assist.

11. A method, comprising:

storing in a storage unit on an integrated circuit information that identifies an analog circuit on the integrated circuit, a selected operating condition, and a required operating configuration comprising tuning parameters for the analog circuit for the selected operating condition, wherein the selected operating condition comprises one of temperature, frequency, and power consumption; and

changing the manner of operating the analog circuit with the required operating configuration in response to detecting the selected operating condition.

12. An integrated circuit, comprising:

a plurality of circuits;

a storage unit that stores information that identifies a circuit of the plurality of circuits on the integrated circuit, a selected voltage from among at least three voltages, and required operating conditions for the circuit, wherein the selected supply voltage is selected from a first voltage below which the circuit may fail to operate reliably and a second voltage above which the circuit may fail to operate reliably, and wherein the required operating conditions comprises one of temperature, frequency, and power consumption; and

a controller that changes the manner of operating the circuit to the required operating conditions in response to detecting that an operating voltage of the circuit is below to the selected voltage when the selected supply voltage is the first voltage, or in response to detecting that the operating voltage of the circuit is above the selected supply voltage when the selected supply voltage is the second voltage.

13. The integrated circuit of claim 12 , wherein:

the controller is further characterized as reading the information in the storage unit prior to the operating voltage changing to the selected voltage.

14. The integrated circuit of claim 12 , wherein the storage unit comprises one of a group consisting of a fuse bank, an electrically programmable fuse bank, a one time programmable memory, a read only memory, a non-volatile memory, a dynamic random access memory, a static random access memory, and a register bank.

15. The integrated circuit of claim 12 wherein the plurality of circuits comprises memories, rows of memories, columns of memories, analog circuits, and digital logic circuits.

16. The integrated circuit of claim 12 , wherein:

the circuit identified in the storage unit comprises a row of a memory; and

the required operating conditions identified in the storage unit comprise one of a group consisting of enabling a read assist and enabling a write assist.

17. The integrated circuit of claim 12 , wherein:

the storage unit further stores circuit information that identifies a second circuit on the integrated circuit, a second selected voltage from among at least the three voltages, and required operating conditions for the second circuit for the second selected voltage; and

the controller changes the manner of operating the second circuit to the required operating conditions for the second circuit in response to an operating voltage of the second circuit changing to the second selected voltage.

Assignments (18)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040925 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Feb 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V. F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 052917/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 040928 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE RELEASE OF SECURITY INTEREST. Recorded Jan 17, 2020
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 052915/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 11759915 AND REPLACE IT WITH APPLICATION 11759935 PREVIOUSLY RECORDED ON REEL 037486 FRAME 0517. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Dec 10, 2019
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 053547/0421 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050744/0097 →
CORRECTIVE ASSIGNMENT TO CORRECT THE TO CORRECT THE APPLICATION NO. FROM 13,883,290 TO 13,833,290 PREVIOUSLY RECORDED ON REEL 041703 FRAME 0536. ASSIGNOR(S) HEREBY CONFIRMS THE THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS.. Recorded Feb 20, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: SHENZHEN XINGUODU TECHNOLOGY CO., LTD.
Reel/Frame 048734/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE PATENTS 8108266 AND 8062324 AND REPLACE THEM WITH 6108266 AND 8060324 PREVIOUSLY RECORDED ON REEL 037518 FRAME 0292. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS. Recorded Feb 1, 2017
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 041703/0536 →
CORRECTIVE ASSIGNMENT TO CORRECT THE NATURE OF CONVEYANCE PREVIOUSLY RECORDED AT REEL: 040652 FRAME: 0241. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER AND CHANGE OF NAME. Recorded Jan 5, 2017
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 041260/0850 →
MERGER Recorded Nov 8, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: NXP USA, INC.
Reel/Frame 040652/0241 →
RELEASE OF SECURITY INTEREST Recorded Nov 7, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 040928/0001 →
RELEASE OF SECURITY INTEREST Recorded Sep 21, 2016
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP, B.V., F/K/A FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 040925/0001 →
SUPPLEMENT TO THE SECURITY AGREEMENT Recorded Jun 16, 2016
From: FREESCALE SEMICONDUCTOR, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039138/0001 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 13, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037518/0292 →
ASSIGNMENT AND ASSUMPTION OF SECURITY INTEREST IN PATENTS Recorded Jan 12, 2016
From: CITIBANK, N.A.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 037486/0517 →
PATENT RELEASE Recorded Dec 21, 2015
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 037354/0823 →
SECURITY AGREEMENT Recorded Nov 6, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 031591/0266 →
SECURITY AGREEMENT Recorded Jun 18, 2013
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 030633/0424 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 27, 2012
From: KENKARE, PRASHANT U.; COOPER, TROY L.; RUSSELL, ANDREW C.; ZHANG, SHAYAN
To: FREESCALE SEMICONDUCTOR, INC.
Reel/Frame 028852/0214 →
SECURITY AGREEMENT Recorded Sep 23, 2009
From: FREESCALE SEMICONDUCTOR, INC.
To: CITIBANK, N.A.
Reel/Frame 023273/0099 →