IP Library Granted Patent US 8,120,117
Granted Patent B2
US 8,120,117 · App. 12/434,070 · Granted Feb 21, 2012

Semiconductor device with metal gate

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Quick Facts
Patent No.
US 8,120,117
App. No.
12/434,070
Granted
Feb 21, 2012
Kind
B2
Abstract

Gate electrode structures having a thin layer of ReO 3 formed with high effective work function and high heat resistance are disclosed. The thin layer of ReO 3 is formed by providing a semiconductor structure having an oxygen-containing metal alloy layer and a rhenium layer. A heat annealing step diffuses Re from the rhenium layer through the high-oxygen containing metal alloy layer to form a thin layer of ReO 3 .

Claims (19)

1. A semiconductor device having a p-type field effect transistor,

comprising:

a high dielectric material layer formed over a semiconductor substrate;

an oxygen-containing metal alloy layer formed over the high dielectric material;

a Re layer formed over the oxygen-containing metal alloy layer,

wherein a layer of Re03 is located between the high dielectric material layer and the oxygen-containing metal alloy layer, and

an n-type field effect transistor comprising:

a high dielectric material layer formed over the semiconductor substrate;

an oxygen-containing metal alloy layer formed over the high dielectric material;

a Si-containing metallic layer formed over the oxygen-contained metal alloy layer;

an Al layer located between the high dielectric material layer and the oxygen-contained metal alloy layer; and

an Al layer located between the Si-containing metal alloy layer and the oxygen-containing metal alloy layer.

2. The semiconductor device of claim 1 , wherein a gate electrode of the p-type field effect transistor has an effective work function greater than about 4.6 eV.

3. The semiconductor device of claim 1 , wherein the Re03 layer has a width from about 0.2 to about 2 nm.

4. The semiconductor device of claim 1 , wherein the oxygen-contained metal alloy layer comprises one or more selected from TiN, TiAIN, TiC, TaC, TaN, TaAIC, and TaAIN.

5. The semiconductor device of claim 1 , further comprising a Si containing metallic layer formed over the Re layer, wherein the Si containing metallic layer comprises one or more selected from poly-Si, polySiGe, Ni-silicide, NiPt-silicide, NiPd-silicide, Ti-silicide and Co-silicide.

6. The semiconductor device of claim 1 , wherein the oxygen-containing metal alloy layer comprises from about 0.5 to about 30 percent by weight of oxygen.

7. The semiconductor device of claim 1 , wherein the oxygen-containing metal alloy layer comprises Re atoms in at least a portion of the grain boundaries of the oxygen-contained metal alloy layer.

8. The semiconductor device of claim 1 , further comprising a Si-containing metallic layer formed over the Re layer.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 9, 2011
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 025777/0577 →
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE PREVIOUSLY RECORDED ON REEL 022626 FRAME 0056. ASSIGNOR(S) HEREBY CONFIRMS THE CORRECTIVE ASSIGNMENT. Recorded Sep 14, 2009
From: TSUCHIYA, YOSHINORI
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 023226/0145 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2009
From: TSUCHIYA, YOSHINORI
To: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
Reel/Frame 022626/0056 →