IP Library Granted Patent US 8,159,645
Granted Patent B2
US 8,159,645 · App. 12/441,469 · Granted Apr 17, 2012

Display panel substrate, a display panel having the substrate, a method of producing the substrate, and a method of producing the display panel

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Quick Facts
Patent No.
US 8,159,645
App. No.
12/441,469
Granted
Apr 17, 2012
Kind
B2
Abstract

A display panel substrate in which parasitic capacitances are provided to data signal lines and any short which occurs between the data signal line and a conductor film can be corrected, and a display panel having the substrate. A plurality of strip conductors 1262 overlap with drawing lines 121 arranged to transmit data signals to data signal lines 111 with an insulating film 132 sandwiched therebetween, and the plurality of strip conductors 1262 are electrically connected by connecting portions 1263, 1264 and 1265 having portions which do not overlap with the drawing lines.

Claims (25)

1. A display panel substrate comprising:

data signal lines;

drawing lines electrically connected to the data signal lines;

an insulating film;

a plurality of strip conductors which overlap with the drawing lines with the insulating film sandwiched therebetween; and

connecting portions arranged to electrically connect the strip conductors to one another.

2. The display panel substrate according to claim 1 , wherein the connecting portions comprise portions which do not overlap with the drawing lines.

3. The display panel substrate according to claim 1 , wherein

the drawing lines comprise zigzag portions,

the strip conductors overlap with the zigzag portions of the drawing lines with the insulating film sandwiched therebetween, and

the connecting portions comprise portions intersecting with the drawing lines in the zigzag portions.

4. The display panel substrate according to claim 1 , wherein

the plurality of strip conductors which overlap with each of the drawing lines with the insulating film sandwiched therebetween are electrically connected linearly by the connecting portions, and

laterally adjacent ones of the plurality of strip conductors which overlap with one of the drawing lines with the insulating film sandwiched therebetween and the plurality of strip conductors which overlap with another one of the drawing lines adjacent to said one of the drawing lines are electrically connected to one another by the connecting portions.

5. The display panel substrate according to claim 1 , wherein

the plurality of strip conductors which overlap with one of the drawing lines with the insulating film sandwiched therebetween are electrically connected linearly by the connecting portions, and

the connecting portions arranged to connect the strip conductors which overlap with one of the drawing lines and the connecting portions arranged to connect the strip conductors which overlap with another one of the drawing lines adjacent to said one of the drawing lines are further electrically connected.

6. The display panel substrate according to claim 1 , wherein the plurality of strip conductors which overlap with the drawing lines with the insulating film sandwiched therebetween are electrically connected linearly by the connecting portions.

7. The display panel substrate according to claim 1 , wherein the strip conductors and the connecting portions arranged to electrically connect the strip conductors are made of a same material as pixel electrodes.

8. The display panel substrate according to claim 1 , further comprising light shielding films which are made of a light shielding material and provided between the drawing lines,

wherein the connecting portions comprise portions which do not overlap with any of the drawing lines and the light shielding films.

9. A display panel comprising:

the display panel substrate according to claim 1 ; and

a common substrate opposed to the display panel substrate.

10. The display panel according to claim 9 , wherein the strip conductors of the display panel substrate are electrically connected to a common potential line of the common substrate by a conductive sealing material.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 12, 2014
From: SHARP KABUSHIKI KAISHA
To: UNIFIED INNOVATIVE TECHNOLOGY, LLC
Reel/Frame 032874/0655 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 23, 2009
From: AKIYAMA, HIROTO; MATSUDA, MASAHIRO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 023017/0861 →