Nonvolatile semiconductor memory device and operation method thereof
View Patent ↗A p-type well region is formed at a main surface of a semiconductor substrate. An n-type impurity region is located under the p-type well region. A first insulating layer is formed on the main surface of the semiconductor substrate and on the p-type well region. A charge-storage insulating layer is formed on the first insulating layer. A gate electrode layer is formed on the charge-storage insulating layer. An erase operation is performed by applying a forward bias to the p-type well region and the n-type impurity region to generate hot carriers and inject the hot carriers into the charge-storage insulating layer.
1. A nonvolatile semiconductor memory device comprising:
a semiconductor substrate having a main surface;
a first impurity region of a first conductivity type formed at the main surface of said semiconductor substrate;
a second impurity region of a second conductivity type located under said first impurity region;
a first insulating layer formed on the main surface of said semiconductor substrate and on said first impurity region;
a charge-storage insulating layer formed on said first insulating layer; and
a gate electrode layer formed on said charge-storage insulating layer;
a second insulating layer formed between said charge-storage insulating layer and said gate electrode layer and made of a material having a larger energy bandgap than said charge-storage insulating layer; and
a third insulating layer formed between said second insulating layer and said gate electrode layer and made of a material having a smaller energy bandgap than said second insulating layer,
said nonvolatile semiconductor memory device being configured to be able to perform an erase operation by applying a forward bias to said first impurity region and said second impurity region to generate a hot carrier and inject the hot carrier into said charge-storage insulating layer.
2. The nonvolatile semiconductor memory device according to claim 1 , wherein
said nonvolatile semiconductor memory device is configured to be able to perform a write operation by removing an electric charge of said charge-storage insulating layer into said gate electrode layer and injecting from said gate electrode layer into said charge-storage insulating layer an electric charge of a polarity opposite to the electric charge removed from said charge-storage insulating layer.
3. The nonvolatile semiconductor memory device according to claim 1 , wherein
said gate electrode layer includes a layer doped with an impurity, and said gate electrode layer is doped with said impurity at a concentration that causes a depletion layer to be generated in said gate electrode layer when said write operation is performed.
4. The nonvolatile semiconductor memory device according to claim 1 , further comprising a channel dope region formed at the main surface of said semiconductor substrate such that a depression state is accomplished while no electric charge is present in said charge-storage insulating layer.
5. An operation method of a nonvolatile semiconductor memory device including a semiconductor substrate having a main surface, a first impurity region of a first conductivity type formed at the main surface of said semiconductor substrate, a second impurity region of a second conductivity type located under said first impurity region, a charge-storage insulating layer formed on the main surface of said semiconductor substrate and on said first impurity region, a gate electrode layer formed on said charge-storage insulating layer, a first insulating layer formed between said charge-storage insulating layer and said gate electrode layer and made of a material having a larger energy bandgap than said charge-storage insulating layer, and a second insulating layer formed between said first insulating layer and said gate electrode layer and made of a material having a smaller energy bandgap than said first insulating layer,
said nonvolatile semiconductor memory device performing an erase operation by applying a forward bias to said first impurity region and said second impurity region and applying a voltage to said gate electrode layer to generate a hot carrier and inject said hot carrier into said charge-storage insulating layer.
6. The operation method of a nonvolatile semiconductor memory device according to claim 5 , wherein
said nonvolatile semiconductor memory device performs a write operation by applying a voltage to said gate electrode layer to remove an electric charge of said charge-storage insulating layer into said gate electrode layer, and inject from said gate electrode layer into said charge-storage insulating layer an electric charge of a polarity opposite to the electric charge removed from said charge-storage insulating layer.