IP Library Granted Patent US 8,842,527
Granted Patent B2
US 8,842,527 · App. 12/445,278 · Granted Sep 23, 2014

High speed multiple user multiple loop DSL system

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Quick Facts
Patent No.
US 8,842,527
App. No.
12/445,278
Granted
Sep 23, 2014
Kind
B2
Abstract

A high speed multiple user multiple-loop DSL system is described. In one embodiment, it includes a first DSL loop to carry DSL traffic to a first user and a second DSL loop to carry DSL traffic to a second user. A first junction connects the traffic of the first DSL loop to a third DSL loop, and a second junction connects the traffic of the second DSL loop to the third DSL loop.

Claims (59)

1. A Digital Subscriber Line (DSL) system, comprising:

a first DSL loop segment communicatively connected to a first user Customer Premises Equipment (CPE); a second DSL loop segment communicatively connected to a second user CPE;

a first junction to connect the first DSL loop segment to a third DSL loop segment;

a second junction to connect the second DSL loop segment to the third DSL loop segment;

a fourth DSL loop segment communicatively connected to the first user CPE;

a fifth DSL loop segment communicatively connected to the second user CPE;

a third junction to connect the fourth DSL loop segment to a sixth DSL loop segment;

a fourth junction to connect the fifth DSL loop segment to the sixth DSL loop segment; and

a line termination DSL device connected to the third DSL loop segment and the sixth DSL loop segment to combine multiple streams of DSL data communication received over the third DSL loop segment and the sixth DSL loop segment from the first user CPE and the second user CPE into a single channel and to multiplex DSL data communication into multiple data streams to be sent to the first user CPE and the second user CPE over the third DSL loop segment and the sixth DSL loop segment.

2. The DSL system of claim 1 , wherein the line termination DSL device is coupled to a Central Office such that the third DSL loop segment transmits data communication from the first DSL loop segment and the second DSL loop segment to the Central Office.

3. The DSL system of claim 1 , further comprising a controller coupled to the line termination DSL device to perform at least one of:

control frequency allocations or time allocations for use in carrying the DSL data communication of the first user CPE and the second user CPE on the third DSL loop segment and the sixth DSL loop segment;

allocate upstream or downstream transmission times to the first user CPE and the second user CPE; and

assign distinctive headers for use by the first user CPE and the second user CPE for use in upstream or downstream transmissions.

4. The DSL system of claim 3 , wherein the controller assigns logical connections to the first user CPE and the second user CPE, each logical connection having transmission parameters and a transmission priority, there being more than one logical connection for at least one of the first user CPE and the second user CPE.

5. The DSL system of claim 3 , wherein the controller detects at least one of:

reflections in data transmitted on the first DSL loop segment and the second DSL loop segment and assigns transmission parameters to the first user CPE and the second user CPE based on the detected reflections; and

improper terminations in the first DSL loop segment and the second DSL loop segment and assigns transmission parameters to the first user CPE and the second user CPE to compensate for the improper terminations.

6. The DSL system of claim 1 , wherein the line termination DSL device further comprising a vectoring unit to vector data communication on the third DSL loop segment and the sixth DSL loop segment such that the DSL data communication is multiplexed into the multiple data streams to be sent to the first user CPE and the second user CPE over the third DSL loop segment and the sixth DSL loop segment.

7. The DSL system of claim 1 , wherein the third DSL loop segment and the sixth DSL loop segment are bonded using either Time-division Inverse Multiplexing (TDIM) bonding, Ethernet bonding, Asynchronous Transfer Mode (ATM) bonding, or the Asymmetric Digital Subscriber Line 2+ (ADSL2+) port bonding protocol to combine the third DSL loop segment and the sixth DSL loop segment into a single logical channel.

8. A method comprising:

sending a first set of Digital Subscriber Line (DSL) data packets through a DSL loop segment to a first user CPE; and

sending a second set of DSL data packets through the DSL loop segment to a second user CPE, wherein the first set of DSL data packets and the second set of DSL data packets are multiplexed on the DSL loop segment; and

wherein sending the first set of DSL data packets comprises sending the first set of DSL data packets through the DSL loop segment to a first junction coupled to a second DSL loop segment, the second DSL loop segment being connected to the first user CPE and wherein sending the second set of DSL data packets comprises sending the second set of DSL data packets through the DSL loop segment to a second junction coupled to a third DSL loop segment, the third DSL loop segment being connected to the second user CPE.

9. The method of claim 8 , wherein the first set of DSL data packets is sent using a different header than the second set of DSL data packets.

10. A method comprising:

sending a first set of Digital Subscriber Line (DSL) data packets through a DSL loop segment to a first user CPE;

sending a second set of DSL data packets through the DSL loop segment to a second user CPE, wherein the first set of DSL data packets and the second set of DSL data packets are multiplexed on the DSL loop segment; and

wherein the DSL loop segment is in a common binder with at least one additional shared DSL loop segment and wherein the first set of DSL data packets and the second set of DSL data packets are demultiplexed onto the DSL loop segment and the at least one additional shared DSL loop segment.

11. The method of claim 10 , wherein the first set of DSL data packets and the second set of DSL data packets are each demultiplexed by decomposing each of the first set of DSL data packets and the second set of DSL data packets into respective multiple data streams to be transmitted through the first DSL loop segment and the additional shared DSL loop segment.

12. An Apparatus comprising:

a plurality of DSL Loop Segments;

a multiplexer;

an inverse multiplexer;

a plurality of transceivers, each comprising a processor; and

wherein each DSL Loop Segment of the plurality of DSL loop Segments is coupled with a different transceiver, wherein each transceiver splits data from a DSL Loop segment into receive data wherein the receive data is processed by a packet inspection module executed by the processor in each transceiver which inspects selected packets and forwards all packets as a receive chain to the multiplexer, wherein the multiplexer combines receive chain packets from the plurality of transceivers into an aggregated stream to be forwarded; and

wherein the inverse multiplex receives a stream of packets and the stream of packets are inverse multiplexed into a separate stream, wherein the separate stream is forwarded to a packet transmission module executed by the processor in each transceiver where each packet of the stream of packets is marked and timing is added resulting in the creation of a plurality of transmit chains which are forwarded to an appropriate DSL loop segment of the plurality of DSL Loop segments.

13. The apparatus of claim 12 :

wherein the transceivers of the apparatus each further comprise memory and wherein the transceivers are further coupled with an operations channel; and

wherein the transceivers' memory receive instructions which when executed by each respective transceivers' processor create initialization messages to uniquely identify packets transmitted through the plurality of DSL loop Segments using at least one of a header and a time slot.

14. The apparatus of claim 12 :

wherein the transceivers of the apparatus are further coupled with an operations channel; and

wherein the transceivers' processor receives encryption keys and parameters for use in encrypting packets for transmission and decrypting received packets.

15. A system comprising:

a first transceiver to send a first set of Digital Subscriber Line (DSL) data packets through a first DSL loop segment;

a second transceiver to send a second set of DSL data packets through a second DSL loop segment;

wherein the first set of DSL data packets and the second set of DSL data packets have been inverse multiplexed onto the first DSL loop segment and the second DSL loop segment respectively;

wherein the first transceiver sends the first set of DSL data packets through the first DSL loop segment to a first junction coupled with a third DSL loop segment; and wherein the second transceiver sends the second set of DSL data packets through the second DSL loop segment to a second junction coupled to the third DSL loop segment.

16. The system of claim 15 , wherein the first set of DSL data packets are sent by the first transceiver using a different header than the second set of DSL data packets sent by the second transceiver.

17. A system comprising:

a transceiver to receive a first set of Digital Subscriber Line (DSL) data packets through a first DSL loop segment;

the transceiver to further receive a second set of DSL data packets through the first DSL loop segment;

wherein the first set of DSL data packets and the second set of DSL data packets are received in a multiplexed signal from the first DSL loop segment;

a demultiplexer to demultiplex the first set of DSL data packets and the second set of DSL data packets from the multiplexed signal on the first DSL loop segment;

wherein the transceiver receives the first set of DSL data packets via the first DSL loop segment from a first junction coupled with a second DSL loop segment; and

wherein the transceiver receives the second set of DSL data packets via the first DSL loop segment from a second junction coupled to a third DSL loop segment.

18. The system of claim 17 :

wherein the first set of DSL data packets and the second set of DSL data packets are sent by the transceiver; and

wherein both of the first set of DSL data packets and the second set of DSL data are each to be demultiplexed by decomposing each of the first set of DSL data packets and the second set of DSL data packets into respective multiple data streams transmitted through the first DSL loop segment.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Aug 17, 2023
From: VALUEGATE ASTRO SPV1
To: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INCORPORATED; ASSIA SPE, LLC
Reel/Frame 064616/0450 →
SECURITY INTEREST Recorded Oct 29, 2022
From: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INCORPORATED; ASSIA SPE LLC
To: VALUEGATE ASTRO SPV1
Reel/Frame 061804/0163 →
RELEASE OF SECURITY INTEREST Recorded Dec 7, 2020
From: MGG CALIFORNIA, LLC
To: ASSIA SPE, LLC
Reel/Frame 054626/0795 →
GRANT OF A SECURITY INTEREST -- PATENTS Recorded Dec 5, 2016
From: ASSIA SPE, LLC
To: MGG CALIFORNIA LLC, AS COLLATERAL AGENT
Reel/Frame 040818/0805 →
RELEASE OF SECURITY INTEREST Recorded Nov 30, 2016
From: PARTNERS FOR GROWTH IV, L.P.
To: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INCORPORATED
Reel/Frame 040766/0202 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 16, 2016
From: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT
To: ASSIA SPE LLC, C/O THE CORPORATION TRUST COMPANY
Reel/Frame 040631/0088 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 3, 2016
From: PARTNERS FOR GROWTH
To: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INC.
Reel/Frame 040212/0569 →
SECURITY INTEREST Recorded Jan 13, 2015
From: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INCORPORATED
To: PARTNERS FOR GROWTH IV, L.P.
Reel/Frame 034760/0220 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 2, 2011
From: CIOFFI, JOHN M.; GINIS, GEORGIOS; JAGANNATHAN, SUMANTH
To: ADAPTIVE SPECTRUM AND SIGNAL ALIGNMENT, INC.
Reel/Frame 025885/0527 →