Thin film transistor and method for preparing the same

1. A method of manufacturing a thin film transistor, the method comprising the steps of:

1) forming a gate electrode on a substrate;

2) forming an insulating layer on the substrate and the gate electrode;

3) forming a semiconductor layer on the insulating layer; and

4) forming a source electrode and a drain electrode by using a zinc oxide electrode material comprising one or more of Si, Mo, and W so as to be connected to the semiconductor layer,

wherein forming the source electrode and the drain electrode includes an etching,

wherein the etching process is a dry etching process using a fluorine gas, and

wherein in the forming of the source electrode and the drain electrode of step 4), the zinc oxide electrode further comprises In 2 O 3 /ZnO/SiO (1:1:1 mol %), In 2 O 3 /ZnO/MoO 3 (1:1:1 mol %), or In 2 O 3 /ZnO/WO 3 (1:1:1 mol %).

2. The method of manufacturing a thin film transistor according to claim 1 , wherein the forming of the source electrode and the drain electrode of step 4) is performed by using a process of forming a conductive material layer using the zinc oxide electrode material comprising one or more of Si, Mo, and W on the insulating layer and the semiconductor layer so that the insulating layer and the semiconductor layer are covered and patterning the conductive material layer to form an electrode pattern.

3. The method of manufacturing a thin film transistor according to claim 1 , wherein in the forming of the source electrode and the drain electrode of step 4), the zinc oxide electrode comprising one or more of Si, Mo, and W is formed by depositing ISZO (Indium Silicon Zinc Oxide), IMZO (Indium molybdenum Zinc Oxide), or ITZO (Indium Tungsten Zinc Oxide) in an oxide form.

4. The method of manufacturing a thin film transistor according to claim 1 , wherein in the forming of the source electrode and the drain electrode of step 4), the specific resistance of each of the source electrode and the drain electrode is more than 0 and 10 −3 ohm·cm or less.

5. The method of manufacturing a thin film transistor according to claim 1 wherein the fluorine gas is CF 4 , NF 3 or SF 6 .

6. The method of manufacturing a thin film transistor according to claim 1 , wherein in the forming of the source electrode and the drain electrode of step 4), thickness of each of the source electrode and the drain electrode is in the range of 50 to 400 nm.

7. The method of manufacturing a thin film transistor according to claim 1 , wherein in the forming of the gate electrode on the substrate of step 1), the substrate is selected from the group consisting of glass, semiconductor wafer, metal oxide, ceramic material and plastic.

8. The method of manufacturing a thin film transistor according to claim 1 , wherein the forming of the gate electrode on the substrate of step 1) is performed by using a process of forming a conductive material layer using the conductive material on the substrate and patterning the conductive material layer to form an electrode pattern; or a process of directly printing the conductive material on the substrate to perform patterning.

9. The method of manufacturing a thin film transistor according to claim 1 , wherein the forming of the semiconductor layer of step 3) is performed by using the complex oxide comprising ZnO and one or more of In, Ga, Sn, and Al.

10. The method of manufacturing a thin film transistor according to claim 9 , wherein in the forming of the semiconductor layer of step 3), the complex oxide is selected from the group consisting of ZTO (Zinc Tin Oxide), IGZO (Indium Gallium Zinc Oxide), ZAO (Zinc Aluminum Oxide), IZO (Indium Zinc Oxide) and ZnO (Zinc Oxide).

11. The method of manufacturing a thin film transistor according to claim 9 , wherein in the forming of the semiconductor layer of step 3), a molar ratio of Zn:Sn is 1:1 or 2:1, a molar ratio of Zn:Al is 1:1 or 2:1, a molar ratio of Zn:In is 1:1 or 2:1, or a molar ratio of Zn:In:Ga is 1:1:1 or 2:1:1 in the complex oxide.

12. A thin film transistor comprising a substrate; a gate electrode; an insulating layer; a semiconductor layer; a source electrode; and a drain electrode,

wherein the source electrode and the drain electrode are a zinc oxide electrode comprising one or more of Si, Mo, and W, and the zinc oxide electrode comprising one or more of Si, Mo, and W is formed by performing a dry etching process using a fluorine gas, and

wherein the zinc oxide electrode further comprises In 2 O 3 /ZnO/SiO (1:1:1 mol %), In 2 O 3 /ZnO/MoO 3 (1:1:1 mol %), or In 2 O 3 /ZnO/WO 3 (1:1:1 mol %).

13. The thin film transistor according to claim 12 , wherein the zinc oxide electrode comprising one or more of Si, Mo, and W comprises oxides of ISZO (Indium Silicon Zinc Oxide), IMZO (Indium molybdenum Zinc Oxide), or ITZO (Indium Tungsten Zinc Oxide).

14. The thin film transistor according to claim 12 , wherein the specific resistance of the zinc oxide electrode comprising one or more of Si, Mo, and W is more than 0 and 10 −3 ohm·cm or less.