IP Library Granted Patent US 7,995,319
Granted Patent B2
US 7,995,319 · App. 12/453,210 · Granted Aug 9, 2011

Semiconductor device with overcurrent protection circuit

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,995,319
App. No.
12/453,210
Granted
Aug 9, 2011
Kind
B2
Abstract

A semiconductor device 1 includes an output MOS transistor M 2 , a sense MOS transistor M 3 , a voltage conversion circuit 20 that converts a sense current of the sense MOS transistor M 3 into a sense voltage, and control MOS transistor M 10 having a gate and a source which receive the sense voltage therebetween and a drain connected to a gate of the output MOS transistor M 2 . The voltage conversion circuit 20 includes a first MOS transistor M 21 diode-connected and a second MOS transistor M 22 connected in series to the first transistor M 21 . A gate of the second transistor M 22 is connected to a node between a gate control circuit 6 and a resistor R 5 which is connected to the gate of the output MOS transistor M 2 . A variation in threshold voltage caused by characteristic variation of the control MOS transistor M 10 causes a variation in output current limiting value, but the threshold voltage of the first MOS transistor M 21 diode-connected varies similarly, whereby the variation in threshold voltage caused by characteristic variation of the control MOS transistor M 10 is cancelled. As a result, the variation in output current limiting value is suppressed.

Claims (25)

1. A semiconductor device, comprising:

an output MOS transistor having a drain connected to a power source terminal, a source connected to an output terminal and a gate receiving a gate control signal from a gate control circuit;

a sense MOS transistor having a gate and a drain which are connected to the gate and the drain of the output MOS transistor, respectively, and a source;

a voltage conversion circuit connected between the source of the sense MOS transistor and the output terminal, and converting a sense current flowing through the sense MOS transistor into a sense voltage; and

a control MOS transistor having a gate and a source which receive the sense voltage therebetween and a drain connected to the gate of the output MOS transistor,

wherein the voltage conversion circuit includes:

a first MOS transistor diode-connected; and

a second MOS transistor, connected in series to the first MOS transistor, and having a gate connected to the gate control circuit.

2. The semiconductor device according to claim 1 , wherein

a threshold voltage of the first MOS transistor has substantially the same characteristic as a threshold voltage of the control MOS transistor.

3. The semiconductor device according to claim 1 , wherein

a drain of the second MOS transistor is connected to the source of the sense MOS transistor, and

a gate and a drain of the first MOS transistor are connected to each other and connected to a source of the second MOS transistor, and a source of the first MOS transistor is connected to the output terminal.

4. The semiconductor device according to claim 1 , wherein

a gate and a drain of the first MOS transistor are connected to each other and connected to the source of the sense MOS transistor, and

a drain of the second MOS transistor is connected to a source of the first MOS transistor, and a source of the second MOS transistor is connected to the output terminal.

5. The semiconductor device according to claim 1 , wherein

the output MOS transistor is an N-channel MOS transistor, and

the gate control circuit comprises a charge pump.

6. The semiconductor device according to claim 1 , wherein

the control MOS transistor and the first MOS transistor are of the same conductivity type.

7. The semiconductor device according to claim 1 , further comprises

a resister connected between the gate control circuit and the gate of the output MOS transistor.

8. The semiconductor device according to claim 7 , wherein

the gate of the second MOS transistor is connected to a node between the gate control circuit and the resistor.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0174 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 1, 2009
From: KOJIMA, MASAKI
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022676/0495 →