Method of forming a metal bump on a semiconductor device
View Patent ↗An uppermost one of multilayered electrode pads, on which a bump and a plating coat will be formed, is made of metal having high ionization tendency, particularly, Al. On the other hand, an uppermost one of multilayered electrode pads, on which none of the bump and the plating coat will be formed, is made of metal having low ionization tendency, particularly, Cu.
1. A method of manufacturing a semiconductor device having a bump, comprising:
providing a substrate;
forming a semiconductor chip on the substrate;
forming a first electrode pad area on the semiconductor chip, the first electrode pad area having a plurality of electrode pads, a top electrode pad among the plurality of electrode pads comprising a first metal;
forming a second electrode pad area on the semiconductor chip, the second electrode pad area having a plurality of electrode pads, a top electrode pad among the plurality of electrode pads comprising a second metal; and
electroless plating of the first and second electrode pad areas, thereby forming a bump on the first electrode pad area, and not forming a bump on the second electrode pad area,
wherein the bump directly contacts the top electrode pad of the first electrode pad area, the first metal has an ionization tendency higher than that of the bump, and the second metal has an ionization tendency lower than that of the bump.
2. A method of manufacturing a semiconductor device having a bump according to claim 1 , wherein the first metal is Al and the second metal is Cu.
3. A method of manufacturing a semiconductor device having a bump according to claim 2 , wherein the bump is made of Ni.
4. A method of manufacturing a semiconductor substrate having a bump, comprising:
providing a substrate;
forming a semiconductor chip and a scribe grid on the substrate;
forming a first electrode pad area on the semiconductor chip, the first electrode pad area having a plurality of electrode pads , a top electrode pad among the plurality of electrode pads comprising a first metal;
forming a second electrode pad area on the scribe grid, the second electrode pad area having a plurality of electrode pads, a top electrode pad among the plurality of electrode pads comprising a second metal;
electroless plating of the first and second electrode pad areas, thereby forming a bump on the first electrode pad area, and not forming a bump on the second electrode pad area,
wherein the bump directly contacts the first metal, the first metal has an ionization tendency higher than that of the bump, and the second metal has an ionization tendency lower than that of the bump.
5. A method of manufacturing a semiconductor substrate having a bump according to claim 4 , wherein the first metal is Al, and the second metal is Cu.
6. A method of manufacturing a semiconductor substrate having a bump according to claim 5 , wherein the bump is made of Ni.
7. A method of manufacturing a semiconductor device having a bump according to claim 4 , further comprising cutting the substrate on the second electrode pad area.
8. A method of manufacturing a semiconductor device having a bump according to claim 4 , wherein the first electrode pad area has three electrode pads, and the second electrode pad area has two electrode pads.
9. A method of manufacturing a semiconductor device having a bump according to claim 4 , wherein there is no material between the bump and the first metal.
10. A method of manufacturing a semiconductor substrate having a bump, comprising:
providing a substrate;
forming a semiconductor chip and a scribe grid on the substrate;
forming an Al electrode pad on the semiconductor chip;
forming a Cu electrode pad on the scribe grid;
electroless Zn plating forming a Zn plating layer on the Al electrode pad;
electroless Ni plating forming a Ni bump on the Al electrode pad.
11. A method of manufacturing a semiconductor device having a bump according to claim 10 , further comprising electroless Au plating forming an Au plating layer on the Ni bump.
12. A method of manufacturing a semiconductor device having a bump according to claim 11 , further comprising cutting the substrate on the Cu electrode pad.