IP Library Granted Patent US 8,785,991
Granted Patent B2
US 8,785,991 · App. 12/453,954 · Granted Jul 22, 2014

Solid state imaging device, method for producing the same, and electronic apparatus

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Quick Facts
Patent No.
US 8,785,991
App. No.
12/453,954
Granted
Jul 22, 2014
Kind
B2
Abstract

A solid state imaging device includes a photoelectric conversion portion in which the shape of potential is provided such that charge is mainly accumulated in a vertical direction.

Claims (23)

1. A solid state imaging device comprising:

a p-type well region in direct physical contact with a p + -type semiconductor region and an n + -type floating diffusion portion, a portion of the p-type well region being between said p + -type semiconductor region and said n + -type floating diffusion portion;

a p + -type first vertically elongated region in direct physical contact with said p + -type semiconductor region and an n-type vertically elongated region, said n-type vertically elongated region being in direct physical contact with said p-type well region and said p + -type first vertically elongated region;

an insulation film in direct physical contact with said p + -type first vertically elongated region and said p + -type semiconductor region, said p-type well region and said n + -type floating diffusion portion being in direct physical contact with said insulation film;

a p + -type bottom surface region in direct physical contact with said n-type vertically elongated region and said p + -type first vertically elongated region, said p + -type bottom surface region being configured to transfer incident light to said n-type vertically elongated region,

wherein an impurity concentration of an n-type conductivity in the n-type vertically elongated region is substantially the same throughout the entirety of said n-type vertically elongated region,

wherein an impurity concentration of a p-type conductivity in the p + -type first vertically elongated region is higher than an impurity concentration of the p-type conductivity in the p-type well region,

wherein more of a signal charge is accumulable in a pn junction between said n-type vertically elongated region and said p + -type first vertically elongated region than in a pn junction between said n-type vertically elongated region and said p + -type semiconductor region, and the shape of potential is provided such that charges are mainly accumulated in a vertical direction.

2. The solid state imaging device according to claim 1 , wherein said impurity concentration of the p-type conductivity in the p + -type first vertically elongated region is substantially the same throughout the entirety of said p + -type first vertically elongated region.

3. The solid state imaging device according to claim 1 , wherein said impurity concentration of the p-type conductivity in the p-type well region is lower than an impurity concentration of the p-type conductivity in the p + -type bottom surface region.

4. The solid state imaging device according to claim 1 , wherein an impurity concentration of the p-type conductivity in the p + -type semiconductor region is higher than said impurity concentration of the p-type conductivity in the p-type well region.

5. The solid state imaging device according to claim 1 , wherein said insulation film and said p + -type bottom surface region are at opposite surfaces of a semiconductor substrate.

6. The solid state imaging device according to claim 1 , wherein said n-type vertically elongated region is in direct physical contact with said p + -type semiconductor region.

7. The solid state imaging device according to claim 1 , wherein said n-type vertically elongated region is between said p + -type first vertically elongated region and said p-type well region.

8. The solid state imaging device according to claim 1 , wherein said p + -type first vertically elongated region is between said p + -type bottom surface region and said insulation film.

9. The solid state imaging device according to claim 1 , wherein said p-type well region is between said p + -type bottom surface region and said insulation film.

10. The solid state imaging device according to claim 1 , wherein said n-type vertically elongated region is between said p + -type bottom surface region and said p + -type semiconductor region.

11. The solid state imaging device according to claim 1 , wherein said p + -type semiconductor region is between said n-type vertically elongated region and said insulation film.

12. The solid state imaging device according to claim 1 , wherein said p-type well region is in direct physical contact with said p + -type bottom surface region.

13. The solid state imaging device according to claim 1 , wherein a portion of the insulation film is between a transfer gate electrode and said portion of the p-type well region.

14. The solid state imaging device according to claim 1 , wherein said n-type vertically elongated region is configured to accumulate said signal charge.

15. The solid state imaging device according to claim 1 , wherein a photodiode comprises said p + -type first vertically elongated region, said n-type vertically elongated region and said p+-type semiconductor region.

16. The solid state imaging device according to claim 15 , wherein said photodiode is configured to convert said incident light into said signal charge.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 19, 2016
From: SONY CORPORATION
To: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
Reel/Frame 040419/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 28, 2009
From: MABUCHI, KEIJI
To: SONY CORPORATION
Reel/Frame 022801/0984 →