Method and apparatus for selectively enabling a microprocessor-based system
View Patent ↗A system for selectively enabling a microprocessor-based system is disclosed. State information that describes the operating conditions or circumstances under which a user intends to operate the system is obtained. In the preferred embodiment of the invention, a valid hash value is determined, preferably based on the state information and preferably by locating the valid hash value within a table of valid hash values indexed by the state information. Candidate authorization information is obtained from the user, and a candidate hash value is generated by applying a hashing algorithm to the candidate authorization information, the state information, or a combination of the candidate authorization information and state information. The candidate hash value and the valid hash value are then compared, and the microprocessor-based system is enabled if the candidate hash value matches the valid hash value. In this manner, the designer or distributor of the system can determine, at the time of manufacture or distribution, the conditions and circumstances under which the system may be operated.
1. A system for selectively enabling a microprocessor-based system, comprising:
(A) circuitry for obtaining state information describing at least one microprocessor-based system operating condition;
(B) a memory for storing said state information;
(C) circuitry for determining at least one valid hash value;
(D) circuitry for obtaining candidate authorization information from a user of said microprocessor-based system;
(E) circuitry for generating a candidate hash value by applying a hashing algorithm to at least:
(1) said candidate authorization information, and
(2) said state information describing at least one microprocessor based system operating condition;
(F) circuitry for comparing said candidate hash value and said at least one valid hash value;
(G) circuitry for enabling said microprocessor-based system if said candidate hash value matches said at least one valid hash value;
(H) circuitry for periodically checking for a reset condition after said enabling said microprocessor-based system if said candidate hash value matches said at least one valid hash value; and
(I) upon detecting a reset condition:
(1) circuitry for executing a power-down sequence;
(2) circuitry for waiting for a power-up condition; and
(3) upon detecting said power-up condition:
(a) circuitry for executing a power-up sequence.
2. The system of claim 1 , wherein said circuitry for determining at least one valid hash value includes:
circuitry for determining said at least one valid hash value based on said state information describing at least one microprocessor-based system operating condition.
3. The system of claim 1 , wherein said circuitry for determining at least one valid hash value includes:
circuitry for referencing a list of valid hash values.
4. The system of claim 1 , further comprising:
circuitry for executing a power-up sequence before said obtaining state information describing at least one microprocessor-based system operating condition.
5. The system of claim 1 , further including:
circuitry for obtaining additional state information; and
circuitry for storing said additional state information in said memory.
6. The system of claim 1 , wherein said memory is a tamper resistant, non-volatile memory.
7. The system of claim 1 , wherein said circuitry for obtaining state information describing at least one microprocessor-based system operating condition includes:
circuitry for retrieving at least a portion of said state information describing at least one microprocessor-based system operating condition from said memory.
8. The system of claim 1 , wherein said hashing algorithm is a one-way hashing algorithm.
9. The system of claim 2 , wherein said circuitry for determining said at least one valid hash value includes:
circuitry for locating said at least one valid hash value within a table of valid hash values indexed by said state information describing at least one microprocessor-based system operating condition.
10. The system of claim 1 , wherein said circuitry for generating a candidate hash value by applying a hashing algorithm to at least said candidate authorization information and said state information includes:
circuitry for applying said hashing algorithm to a catenation of said candidate authorization information and said state information describing at least one microprocessor-based system operating condition.
11. The system of claim 1 , wherein said state information describes any of:
a geographic location;
a geographic region;
a date;
a range of dates;
a time; and
a range of times.
12. The system of claim 5 , wherein said additional state information describes a prior usage history of said microprocessor-based system.