Method and apparatus for selectively enabling a microprocessor-based system
View Patent ↗A system for selectively enabling a microprocessor-based system is disclosed. State information that describes the operating conditions or circumstances under which a user intends to operate the system is obtained. In the preferred embodiment of the invention, a valid hash value is determined, preferably based on the state information and preferably by locating the valid hash value within a table of valid hash values indexed by the state information. Candidate authorization information is obtained from the user, and a candidate hash value is generated by applying a hashing algorithm to the candidate authorization information, the state information, or a combination of the candidate authorization information and state information. The candidate hash value and the valid hash value are then compared, and the microprocessor-based system is enabled if the candidate hash value matches the valid hash value. In this manner, the designer or distributor of the system can determine, at the time of manufacture or distribution, the conditions and circumstances under which the system may be operated.
1. A method for selectively enabling a microprocessor-based system, comprising the steps of:
obtaining state information describing at least one microprocessor-based system operating condition;
determining at least one valid hash value;
obtaining candidate authorization information from a user of said microprocessor-based system;
generating, via a processor, a candidate hash value by applying a hashing algorithm to:
said candidate authorization information, and
said state information describing at least one microprocessor based system operating condition;
comparing said candidate hash value and said at least one valid hash value;
enabling, via the processor, said microprocessor-based system if said candidate hash value matches said at least one valid hash value;
after said enabling, via the processor, said microprocessor-based system if said candidate hash value matches said at least one valid hash value, obtaining additional state information; and
storing said additional state information in a memory.
2. The method of claim 1 , wherein said determining at least one valid hash value comprises:
determining said at least one valid hash value based on said state information describing at least one microprocessor-based system operating condition.
3. The method of claim 1 , wherein said determining at least one valid hash value comprises:
referencing a list of valid hash values.
4. The method of claim 1 , further comprising:
before said obtaining state information describing at least one microprocessor-based system operating condition, executing a power-up sequence.
5. The method of claim 1 , further comprising:
periodically checking for a reset condition; and
if said reset condition is detected:
executing a power-down sequence;
waiting for a power-up condition; and
upon detecting said power-up condition, executing a power-up sequence.
6. The method of claim 1 , wherein said memory is a tamper resistant, non-volatile memory.
7. The method of claim 1 , wherein said obtaining state information describing at least one microprocessor-based system operating condition comprises:
retrieving at least a portion of said state information describing at least one microprocessor-based system operating condition from a memory.
8. The method of claim 7 , wherein said memory is a tamper resistant, non-volatile memory.
9. The method of claim 1 , wherein said hashing algorithm is a one-way hashing algorithm.
10. The method of claim 2 , wherein said determining said at least one valid hash value comprises:
locating said at least one valid hash value within a table of valid hash values indexed by said state information describing at least one microprocessor-based system operating condition.
11. The method of claim 1 , wherein said generating a candidate hash value by applying a hashing algorithm to at least said candidate authorization information and said state information comprises:
applying said hashing algorithm to a catenation of said candidate authorization information and said state information describing at least one microprocessor-based system operating condition.
12. The method of claim 1 , wherein said state information describes any of:
a geographic location;
a geographic region;
a date;
a range of dates;
a time; and
a range of times.
13. The method of claim 1 , wherein said obtaining additional state information describes a prior usage history of said microprocessor-based system.
14. A method for selectively enabling a microprocessor-based system, comprising the steps of:
obtaining state information describing at least one microprocessor-based system operating condition;
locating at least one valid hash value within a table of valid hash values indexed by said state information describing at least one microprocessor-based system operating condition;
obtaining candidate authorization information from a user of said microprocessor-based system;
generating, via a processor, a candidate hash value by applying a one-way hashing algorithm to said candidate authorization information and said state information describing at least one microprocessor based system operating condition;
comparing said candidate hash value and said valid hash value; and
enabling, via the processor, said microprocessor-based system if said candidate hash value matches said valid hash value.
15. An apparatus for selectively enabling a microprocessor-based system, comprising:
means for obtaining state information describing at least one microprocessor-based system operating condition;
means for determining at least one valid hash value;
means for obtaining candidate authorization information from a user of said microprocessor-based system;
means for generating a candidate hash value by applying a hashing algorithm to at least said candidate authorization information and said state information describing at least one microprocessor-based system operating condition;
means for comparing said candidate hash value and said at least one valid hash value; and
means for enabling said microprocessor-based system if said candidate hash value matches said at least one valid hash value; and
means for locating said at least one valid hash value within a table of valid hash values indexed by said state information describing at least one microprocessor-based system operating condition.
16. The apparatus of claim 15 , wherein said means for determining at least one valid hash value comprises:
means for determining said at least one valid hash value based on said state information describing at least one microprocessor-based system operating condition.
17. The apparatus of claim 15 , wherein said means for determining at least one valid hash value comprises:
means for referencing a list of valid hash values.
18. The apparatus of claim 15 , further comprising: means for executing a power-up sequence before obtaining said state information.
19. The apparatus of claim 15 , further comprising: means for said microprocessor-based system periodically checking for a reset condition after an enabling of said microprocessor-based system if said candidate hash value matches said at least one valid hash value; and
if said reset condition is detected:
means for executing a power-down sequence;
means for waiting for a power-up condition; and
upon detecting said power-up condition, means for executing said power-up sequence.
20. The apparatus of claim 15 , further comprising:
means for obtaining additional state information; and
means for storing said additional state information in a memory.
21. The apparatus of claim 20 , wherein said memory is a tamper resistant, non-volatile memory.
22. The apparatus of claim 15 , wherein said means for obtaining state information describing at least one microprocessor-based system operating condition comprises:
means for retrieving at least a portion of said state information describing at least one microprocessor-based system operating condition from a memory.
23. The apparatus of claim 22 , wherein said memory is a tamper resistant, non-volatile memory.
24. The apparatus of claim 15 , wherein said hashing algorithm is a one-way hashing algorithm.
25. The apparatus of claim 15 , wherein said means for generating a candidate hash value by applying a hashing algorithm to at least said candidate authorization information and said state information comprises:
means for applying said hashing algorithm to a catenation of said candidate authorization information and said state information describing at least one microprocessor-based system operating condition.
26. The apparatus of claim 15 , wherein said state information describes any of:
a geographic location;
a geographic region;
a date;
a range of dates;
a time; and
a range of times.
27. The apparatus of claim 20 , wherein said additional state information describes a prior usage history of said microprocessor-based system.
28. An apparatus for selectively enabling a microprocessor-based system, comprising:
means for obtaining state information describing at least one microprocessor-based system operating condition;
means for locating a valid hash value within a table of valid hash values indexed by said state information;
means for obtaining candidate authorization information from a user of said microprocessor-based system;
means for generating a candidate hash value by applying a one-way hashing algorithm to said candidate authorization information and state information;
means for comparing said candidate hash value and said valid hash value; and
means for enabling said microprocessor-based system if said candidate hash value matches said valid hash value.