IP Library Granted Patent US 8,212,492
Granted Patent B2
US 8,212,492 · App. 12/457,518 · Granted Jul 3, 2012

Electronic ballast with high power factor

Assignee: Queen's University at Kingston
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Quick Facts
Patent No.
US 8,212,492
App. No.
12/457,518
Granted
Jul 3, 2012
Kind
B2
Abstract

This invention provides an electronic ballast for a fluorescent lamp, including a rectifier for converting an alternating current input voltage into a direct current output voltage, and a circuit including a combined power factor correction (PFC) stage and an inverter, wherein the PFC stage and the inverter share a switch. Also provided is a controller for an electronic ballast, including a duty ratio controller that controls a duty ratio of a switch of the ballast, and means for adjusting the duty ratio according to a nonlinear function, so that an arc is sustained across the lamp. The controller and the ballast allow dimming of the fluorescent lamp while maintaining a high power factor.

Claims (34)

1. An electronic ballast circuit for a fluorescent lamp, comprising:

a rectifier for converting an alternating current input voltage into a direct current output voltage; and

a circuit including a combined power factor correction (PFC) stage and an inverter;

wherein the PFC stage and the inverter share a switch;

wherein the electronic ballast circuit operates with only one switch.

2. The electronic ballast circuit of claim 1 , wherein the PFC stage includes a single ended primary inductor converter (SEPIC).

3. The electronic ballast circuit of claim 1 , wherein the inverter is a resonant inverter.

4. The electronic ballast circuit of claim 1 , wherein the shared switch is the only switch.

5. The electronic ballast circuit of claim 1 , further comprising an EMI filter.

6. The electronic ballast circuit of claim 1 , wherein the fluorescent lamp is a compact fluorescent lamp (CFL).

7. The electronic ballast circuit of claim 1 , wherein the inverter is a current fed inverter.

8. The electronic ballast circuit of claim 7 , wherein the current fed inverter includes a C-L-L resonant circuit.

9. A fluorescent lamp comprising the electronic ballast circuit of claim 1 .

10. The fluorescent lamp of claim 9 , wherein the fluorescent lamp is a CFL.

11. The electronic ballast circuit of claim 1 , including means for operating the shared switch at a selected duty ratio.

12. The electronic ballast circuit of claim 11 , wherein the duty ratio is variable.

13. The electronic ballast circuit of claim 12 , wherein the duty ratio is variable in accordance with a line voltage applied to the electronic ballast circuit.

14. A method for operating a fluorescent lamp, comprising:

converting an alternating current input voltage into a direct current output voltage;

connecting the direct current output voltage to a circuit including a combined power factor correction (PFC) stage and an inverter; and

connecting an output of the circuit to the fluorescent lamp;

wherein the PFC stage and the inverter share a switch;

wherein operating the fluorescent lamp uses only one switch.

15. The method of claim 14 , including using a SEPIC for the PFC stage.

16. The method of claim 14 , including using a resonant inverter for the inverter.

17. The method of claim 14 , wherein the shared switch is the only switch.

18. The method of claim 14 , including filtering the input voltage with an EMI filter.

19. The method of claim 14 , wherein the fluorescent lamp is a CFL.

20. The method of claim 14 , including using a current fed inverter for the inverter.

21. The method of claim 20 , wherein the current fed inverter includes a C-L-L resonant circuit.

22. The method of claim 14 , including operating the shared switch at a selected duty ratio.

23. The method of claim 22 , including varying the duty ratio.

24. The method of claim 23 , including varying the duty ratio in accordance with the input voltage.

25. The method of claim 22 , including adjusting the duty ratio according to a nonlinear function, so that an arc is sustained across the lamp during changes in supply voltage.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2013
From: QUEEN'S UNIVERSITY AT KINGSTON
To: JAIN, PRAVEEN K.; LAM, JOHN C. W.
Reel/Frame 030930/0944 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2010
From: LAM, JOHN; JAIN, PRAVEEN
To: QUEEN'S UNIVERSITY AT KINGSTON
Reel/Frame 024080/0886 →
Continuity (3)
Provisional Application 61129251 · Jun 13, 2008
Provisional Application 61202757 · Apr 1, 2009
Related Publication 20100039038A1 · Feb 18, 2010