IP Library Granted Patent US 8,327,064
Granted Patent B2
US 8,327,064 · App. 12/458,226 · Granted Dec 4, 2012

Data processor with flash memory, and method for accessing flash memory

Assignee: Renesas Electronics Corporation
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Quick Facts
Patent No.
US 8,327,064
App. No.
12/458,226
Granted
Dec 4, 2012
Kind
B2
Abstract

A data processor includes a flash memory that stores a plurality of types of data therein, a random access memory that stores record data information therein, and a controller that can access the flash memory and the RAM. The record data information indicates a head address in the flash memory and a data length corresponding to latest data of each of the plurality of types of data. The controller reads, from the flash memory, the latest data of a type of a reading target among the plurality of types of data, with reference to the record data information.

Claims (45)

1. A method of accessing a flash memory, comprising:

reading latest data for each identifier from a flash memory, said reading comprising;

creating a free space information indicating a free space head address based on an identified head of the free space,

creating record data including a head address in the flash memory and a data length in response to each of the read latest data;

storing the record data and the free space information into a random access memory (RAM), with respect to each of the identifier;

acquiring an identifier of a reading target;

reading the record data corresponding to the identifier of the reading target and the free space information from the RAM;

reading data of the reading target from the flash memory based on the read record data; and

writing new data to the head of the free space with reference to the read free space information without overwriting existing data when writing new data to the flash memory.

2. The method according to claim 1 ,

wherein the flash memory includes a plurality of blocks, and each block includes a status flag,

wherein the reading of the latest data comprises:

searching the status flag from a last block toward a head block in the flash memory; and

identifying a block including a status flag indicative that the latest data is included therein, as a last available block.

3. The method according to claim 2 ,

wherein data stored in the block of the flash memory includes the identifier, a data main body, and an end flag,

wherein the reading of the latest data further comprises:

searching the end flag of the data from the end address of the last available block toward the head address thereof;

identifying a space following the end flag firstly detected as a head of a free space; and

storing the free space information into the RAM.

4. The method according to claim 2 ,

wherein data stored in the block of the flash memory includes the identifier and a data main body,

wherein the reading of the latest data further comprises:

reading the data from an end address of the last available block toward a head address thereof; and

identifying the read data as the latest data corresponding to a new identifier, when the data with a new identifier ID is read.

5. The method according to claim 1 ,

wherein the flash memory includes a plurality of blocks, and each block comprises a status flag,

wherein the reading data of the reading target comprises:

confirming the status flag of a reading target block storing the reading data; and

cancelling a reading operation to execute an abnormal condition processing, when the status flag indicative that the latest data is included therein is not confirmed.

6. The method according to claim 3 , further comprising:

acquiring the free space information from the RAM.

7. The method according to claim 6 ,

wherein the writing comprises:

confirming the status flag of a writing target block for writing the new data; and

cancelling a writing operation to execute an abnormal condition processing, when the status flag indicative that the latest data is included therein is not confirmed.

8. The method according to claim 6 , further comprising:

creating a new record data including a head address in the flash memory and a data length in response to the new data, when the record data corresponding to the identifier of the new data is not stored in the RAM; and

storing the new record data into the RAM, with respect to the identifier of the new data.

9. The method according to claim 6 , further comprising:

creating an updating record data including a head address in the flash memory and a data length in response to the new data, when the record data corresponding to the identifier of the new data is stored in the RAM; and

updating the record data corresponding to the identifier of the new data in the RAM, with the updating record data.

10. The method according to claim 4 , further comprising:

detecting a maximum identifier number of the identifier corresponding to the latest data; and

storing the detected maximum identifier number as a maximum identifier information into the RAM.

Assignments (2)
CHANGE OF NAME Recorded Oct 26, 2010
From: NEC ELECTRONICS CORPORATION
To: RENESAS ELECTRONICS CORPORATION
Reel/Frame 025193/0174 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 6, 2009
From: KITAGAWA, KATSUHISA
To: NEC ELECTRONICS CORPORATION
Reel/Frame 022963/0863 →
Priority Claims (1)
JP 2008-181071 · Jul 11, 2008 · national
Continuity (1)
Related Publication 20100011155A1 · Jan 14, 2010