IP Library Granted Patent US 8,553,022
Granted Patent B2
US 8,553,022 · App. 12/458,756 · Granted Oct 8, 2013

Image display device and driving method of image display device

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Quick Facts
Patent No.
US 8,553,022
App. No.
12/458,756
Granted
Oct 8, 2013
Kind
B2
Abstract

Disclosed herein is an image display device including a display section, a signal line driving circuit, and a scanning line driving circuit. The display section is formed by arranging pixel circuits in a form of a matrix. The signal line driving circuit is configured to output a driving signal for a signal line to the signal line of the display section. The scanning line driving circuit is configured to output a driving signal for a scanning line to the scanning line of the display section. The pixel circuits each include at least a light emitting element, a driving transistor configured to drive the light emitting element connected to a source by a driving current corresponding to a gate-to-source voltage, a storage capacitor configured to retain the gate-to-source voltage, and a writing transistor configured to set a terminal voltage of the storage capacitor by a voltage of the signal line.

Claims (59)

1. An image display device comprising:

a display section formed by arranging pixel circuits in a form of a matrix;

a signal line driving circuit configured to output a driving signal for a signal line to the signal line of said display section; and

a scanning line driving circuit configured to output a driving signal for a scanning line to the scanning line of said display section;

wherein said pixel circuits each include at least

a light emitting element,

a driving transistor configured to drive said light emitting element connected to a source by a driving current corresponding to a gate-to-source voltage,

a storage capacitor configured to retain said gate-to-source voltage, and

a writing transistor configured to set a terminal voltage of said storage capacitor by a voltage of the signal line,

at least said driving transistor is created by being subjected to an annealing process by irradiation with a laser beam;

in said display section, adjacent pixel circuits of said pixel circuits are created in axisymmetric form with respect to the scanning line and/or the signal line; and

said signal line driving circuit changes a setting of a voltage of the driving signal for said signal line between said adjacent pixel circuits,

wherein said adjacent pixel circuits are an odd-numbered pixel circuit and an even-numbered pixel circuit as determined from one end of said scanning line, and

said signal line driving circuit changes the setting of the voltage of the driving signal for said signal line between a signal line of said odd-numbered pixel circuit and a signal line of said even-numbered pixel circuit, and

wherein said pixel circuits alternately repeat an emission period for making said light emitting element emit light and a non-emission period for stopping light emission of said light emitting element and setting light emission luminance of said light emitting element in a following emission period,

in said non-emission period, said pixel circuits set a voltage across said storage capacitor to a voltage more than a threshold voltage of said driving transistor, and set the voltage across said storage capacitor to a voltage corresponding to the threshold voltage of said driving transistor by discharging the voltage across said storage capacitor via said driving transistor, and

said pixel circuits next set a terminal voltage of said storage capacitor to a voltage of said signal line to set the light emission luminance of said light emitting element in said following emission period.

2. The image display device according to claim 1 ,

wherein to change the setting of the voltage of the driving signal for said signal line is to change a gain of said driving signal.

3. The image display device according to claim 1 ,

wherein to change the setting of the voltage of the driving signal for said signal line is to change an offset voltage of said driving signal.

4. The image display device according to claim 1 ,

wherein said pixel circuits correct variation in mobility of said driving transistor and set the light emission luminance of said light emitting element in the following said emission period by setting the terminal voltage of said storage capacitor to the voltage of said signal line by setting said writing transistor in an on state for a certain period.

5. The image display device according to claim 4 ,

wherein said pixel circuits set a source voltage of said driving transistor by a setting of a driving signal for power supply to said driving transistor, and set the voltage across said storage capacitor to the voltage more than the threshold voltage of said driving transistor by setting the terminal voltage of said storage capacitor via said signal line.

6. A driving method of an image display device, said image display device including a display section formed by arranging pixel circuits in a form of a matrix, a signal line driving circuit configured to output a driving signal for a signal line to the signal line of said display section, and a scanning line driving circuit configured to output a driving signal for a scanning line to the scanning line of said display section, said pixel circuits each including at least a light emitting element, a driving transistor configured to drive said light emitting element connected to a source by a driving current corresponding to a gate-to-source voltage, a storage capacitor configured to retain said gate-to-source voltage, and a writing transistor configured to set a terminal voltage of said storage capacitor by a voltage of the signal line, at least said driving transistor being created by being subjected to an annealing process by irradiation with a laser beam, and in said display section, adjacent pixel circuits of said pixel circuits being created in axisymmetric form with respect to the scanning line and/or the signal line, the driving method of said image display device comprising:

changing, by said signal line driving circuit, a setting of a voltage of the driving signal for said signal line between said adjacent pixel circuits,

wherein said adjacent pixel circuits are an odd-numbered pixel circuit and an even-numbered pixel circuit as determined from one end of said scanning line, and

said signal line driving circuit changes the setting of the voltage of the driving signal for said signal line between a signal line of said odd-numbered pixel circuit and a signal line of said even-numbered pixel circuit; and

alternately repeating, by said pixel circuits, an emission period for making said light emitting element emit light and a non-emission period for stopping light emission of said light emitting element and setting light emission luminance of said light emitting element in a following emission period, wherein

in said non-emission period, said pixel circuits set a voltage across said storage capacitor to a voltage more than a threshold voltage of said driving transistor, and set the voltage across said storage capacitor to a voltage corresponding to the threshold voltage of said driving transistor by discharging the voltage across said storage capacitor via said driving transistor, and

said pixel circuits next set a terminal voltage of said storage capacitor to a voltage of said signal line to set the light emission luminance of said light emitting element in said following emission period.

7. The method according to claim 6 , wherein to change the setting of the voltage of the driving signal for said signal line is to change a gain of said driving signal.

8. The method according to claim 6 , wherein to change the setting of the voltage of the driving signal for said signal line is to change an offset voltage of said driving signal.

9. The method according to claim 6 , wherein said pixel circuits correct variation in mobility of said driving transistor and set the light emission luminance of said light emitting element in the following said emission period by setting the terminal voltage of said storage capacitor to the voltage of said signal line by setting said writing transistor in an on state for a certain period.

10. An image display device comprising:

a display section formed by arranging pixel circuits in a form of a matrix;

a signal line driving circuit configured to output a driving signal for a signal line to the signal line of said display section; and

a scanning line driving circuit configured to output a driving signal for a scanning line to the scanning line of said display section;

wherein said signal line driving circuit includes

a first digital-to-analog converter circuit corresponding to a first reference voltage, and

a second digital-to-analog converter circuit corresponding to a second reference voltage;

said pixel circuits each include at least

a light emitting element, and

a driving transistor configured to drive said light emitting element; and

in an adjacent pixel circuit adjacent to a said pixel circuit and having a driving transistor whose source and drain are disposed in an orientation different from an orientation of the driving transistor of said pixel circuit, a signal line corresponding to an output of said first digital-to-analog converter circuit is connected to said pixel circuit, and a signal line corresponding to an output of said second digital-to-analog converter circuit is connected to said adjacent pixel circuit

wherein said pixel circuits alternately repeat an emission period for making said light emitting element emit light and a non-emission period for stopping light emission of said light emitting element and setting light emission luminance of said light element in a following emission period,

in said non-emission period, said pixel circuits set a voltage across said storage capacitor to a voltage more than a threshold voltage of said driving transistor, and set the voltage across said storage capacitor to a voltage corresponding to the threshold voltage of said driving transistor by discharging the voltage across said storage capacitor via said driving transistor, and

said pixel circuits next set a terminal voltage of said storage capacitor to a voltage of said signal line to set the light emission luminance of said light emitting element in said following emission period.

11. The image display device according to claim 10 , wherein to change the setting of the voltage of the driving signal for said signal line is to change a gain of said driving signal.

12. The image display device according to claim 10 , wherein to change the setting of the voltage of the driving signal for said signal line is to change an offset voltage of said driving signal.

13. The image display device according to claim 10 , wherein said pixel circuits correct variation in mobility of said driving transistor and set the light emission luminance of said light emitting element in the following said emission period by setting the terminal voltage of said storage capacitor to the voltage of said signal line by setting said writing transistor in an on state for a certain period.

14. A driving method of an image display device, said image display device including a display section formed by arranging pixel circuits in a form of a matrix, a signal line driving circuit configured to output a driving signal for a signal line to the signal line of said display section, and a scanning line driving circuit configured to output a driving signal for a scanning line to the scanning line of said display section, wherein said signal line driving circuit includes a first digital-to-analog converter circuit corresponding to a first reference voltage, and a second digital-to-analog converter circuit corresponding to a second reference voltage, said pixel circuits each include at least a light emitting element, and a driving transistor configured to drive said light emitting element, and in an adjacent pixel circuit adjacent to a said pixel circuit and having a driving transistor whose source and drain are disposed in an orientation different from an orientation of the driving transistor of said pixel circuit, a signal line corresponding to an output of said first digital-to-analog converter circuit is connected to said pixel circuit, and a signal line corresponding to an output of said second digital-to-analog converter circuit is connected to said adjacent pixel circuit, the method comprising:

alternately repeating, by said pixel circuits, an emission period for making said ht emitting element emit light and a non-emission period for stopping light emission of said light emitting element and setting light emission luminance of said light emitting element in a following emission period, wherein

in said non-emission period, said pixel circuits set a voltage across said storage capacitor to a voltage more than a threshold voltage of said driving transistor, and set the voltage across said storage capacitor to a voltage corresponding to the threshold voltage of said driving transistor by discharging the voltage across said storage capacitor via said driving transistor, and

said pixel circuits next set a terminal voltage of said storage capacitor to a voltage of said signal line to set the light emission luminance of said light emitting element in said following emission period.

15. The method according to claim 14 , wherein to change the setting of the voltage of the driving signal for said signal line is to change a gain of said driving signal.

16. The method according to claim 14 , wherein to change the setting of the voltage of the driving signal for said signal line is to change an offset voltage of said driving signal.

17. The method according to claim 14 , wherein said pixel circuits correct variation in mobility of said driving transistor and set the light emission luminance of said light emitting element in the following said emission period by setting the terminal voltage of said storage capacitor to the voltage of said signal line by setting said writing transistor in an on state for a certain period.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 22, 2009
From: HANDA, TOMOAKI; SEO, YUUKI; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 023031/0185 →