IP Library Granted Patent US 8,284,178
Granted Patent B2
US 8,284,178 · App. 12/461,666 · Granted Oct 9, 2012

Display panel module and electronic apparatus

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Quick Facts
Patent No.
US 8,284,178
App. No.
12/461,666
Granted
Oct 9, 2012
Kind
B2
Abstract

A self-light-emission-type display panel module employs: a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having a signal holding capacitor, a device driving transistor, and a signal sampling transistor; a first driving section; a second driving section; and a third driving section.

Claims (73)

1. A self-light-emission-type display panel module comprising:

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a first electrode of said signal holding capacitor and a first current electrode connected to a second electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor, and

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor;

a first driving section configured to assert said signal electric potential on a data signal line;

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor; and

a third driving section configured to provide a second control line connected to a second current electrode of said device driving transistor sequentially with the following three different driving voltages:

a first driving voltage having a lowest electric potential during a time span between the initial time of a no-light emission period and the start of a period for compensating said device driving transistor for characteristic variations,

a second driving voltage having a highest electric potential during a time span between said start of said period for compensating said device driving transistor and an initial portion of a light emission period, and

a third driving voltage having an intermediate electric potential after said initial portion of said light emission period.

2. The display panel module according to claim 1 wherein a period T used to assert each signal electric potential corresponding to a pixel gradation is set at a value shorter than a mobility compensation time t calculated for said signal electric potential.

3. A self-light-emission-type display panel module comprising:

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a first electrode of said signal holding capacitor and a first current electrode connected to a second electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor,

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor, and

a coupling capacitor having a first electrode connected to said control electrode of said device driving transistor and a second electrode connected to a third control line;

a first driving section configured to assert said signal electric potential on a data signal line;

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor;

a third driving section configured to control an operation to supply a driving voltage to said device driving transistor and an operation to stop said operation to supply a driving voltage to said device driving transistor; and

a fourth driving section configured to provide said third control line sequentially with the following two different driving voltages:

a high-level driving voltage having a relatively high electric potential during a time span between the start of a characteristic compensation period and an initial portion of a light emission period, and

a low-level driving voltage having a relatively low electric potential after said initial portion of said light emission period.

4. The display panel module according to claim 3 wherein a period T used to assert each signal electric potential corresponding to a pixel gradation is set at a value shorter than a mobility compensation time t calculated for said signal electric potential.

5. A self-light-emission-type display panel module comprising:

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having at least

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a first electrode of said signal holding capacitor and a first current electrode connected to a second electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor, and

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor;

a first driving section configured to assert said signal electric potential on a data signal line;

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor; and

a third driving section configured to decrease an electric potential appearing at said control electrode of said device driving transistor through a coupling effect exercised after an initial portion of a light emission period.

6. An electronic apparatus comprising:

a self-light-emission-type display panel module having

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a first electrode of said signal holding capacitor and a first current electrode connected to a second electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor, and

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor,

a first driving section configured to assert said signal electric potential on a data signal line,

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor, and

a third driving section configured to provide a second control line connected to a second current electrode of said device driving transistor sequentially with the following three different driving voltages:

a first driving voltage having a lowest electric potential during a time span between the initial time of a no-light emission period and the start of a period for compensating said device driving transistor for characteristic variations,

a second driving voltage having a highest electric potential during a time span between said start of said period for compensating said device driving transistor and an initial portion of a light emission period, and

a third driving voltage having an intermediate electric potential after said initial portion of said light emission period;

a system control section configured to control operations of an entire system of said electronic apparatus; and

an operation input section configured to receive operation inputs entered to said system control section.

7. An electronic apparatus comprising:

a self-light-emission-type display panel module having

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a specific one of the two electrodes of said signal holding capacitor and a specific main electrode connected to the other electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor,

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor, and

a coupling capacitor having a first electrode connected to said control electrode of said device driving transistor and a second electrode connected to a third control line,

a first driving section configured to assert said signal electric potential on a data signal line,

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor,

a third driving section configured to control an operation to supply a driving voltage to said device driving transistor and an operation to stop said operation to supply a driving voltage to said device driving transistor, and

a fourth driving section configured to provide said third control line sequentially with the following two different driving voltages:

a high-level driving voltage having a relatively high electric potential during a time span between the start of a characteristic compensation period and an initial portion of a light emission period, and

a low-level driving voltage having a relatively low electric potential after said initial portion of said light emission period;

a system control section configured to control operations of an entire system of said electronic apparatus; and

an operation input section configured to receive operation inputs entered to said system control section.

8. An electronic apparatus comprising:

a self-light-emission-type display panel module having

a pixel array section including pixel areas laid out to form a two dimensional matrix in a display area to serve as pixel areas each having at least

a signal holding capacitor,

a device driving transistor provided with a control electrode connected to a first electrode of said signal holding capacitor and a first current electrode connected to a second electrode of said signal holding capacitor to serve as a transistor for providing a self-light-emitting device connected to said device driving transistor with a driving current having a magnitude according to a voltage stored in said signal holding capacitor, and

a signal sampling transistor for controlling an operation to supply a signal electric potential to said control electrode of said device driving transistor,

a first driving section configured to assert said signal electric potential on a data signal line,

a second driving section configured to assert an electric-potential write timing signal on a first control line connected to a control electrode of said signal sampling transistor, and

a third driving section configured to decrease an electric potential appearing at said control electrode of said device driving transistor through a coupling effect exercised after an initial portion of a light emission period;

a system control section configured to control operations of an entire system of said electronic apparatus; and

an operation input section configured to receive operation inputs entered to said system control section.

Assignments (6)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 18, 2025
From: JDI DESIGN AND DEVELOPMENT G.K.
To: MAGNOLIA BLUE CORPORATION
Reel/Frame 072039/0656 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 31, 2024
From: JOLED, INC.
To: JDI DESIGN AND DEVELOPMENT G.K.
Reel/Frame 066382/0619 →
CORRECTION BY AFFIDAVIT FILED AGAINST REEL/FRAME 063396/0671 Recorded Jun 12, 2023
From: JOLED, INC.
To: JOLED, INC.
Reel/Frame 064067/0723 →
SECURITY INTEREST Recorded Apr 20, 2023
From: JOLED, INC.
To: INCJ, LTD.
Reel/Frame 063396/0671 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 15, 2015
From: SONY CORPORATION
To: JOLED INC.
Reel/Frame 036106/0355 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 20, 2009
From: YAMASHITA, JUNICHI; UCHINO, KATSUHIDE
To: SONY CORPORATION
Reel/Frame 023153/0093 →