Fabrication of magnetoresistive sensors and electronic lapping guides
View Patent ↗The subject matter disclosed herein provides methods for manufacturing an electronic lapping guide and a magnetic read head assembly. The magnetoresistive head assembly includes a sensing element that has a front edge and a front flux guide that has a back edge, such that the sensing element front edge and the front flux guide back edge share a common interface that defines an interface plane normal to the surface of a wafer substrate. The electronic lapping guide comprises a conductive material adapted to attach to two electrical leads for measuring a resistance through the conductive material. The conductive material may include a conductive material back edge aligned with the interface plane. The resistance of the conductive material may be inversely proportional to a conductive material length normal to the interface plane.
1. A method comprising:
depositing a first shield layer on a wafer substrate for a sensing structure comprising a sensing element;
depositing a first alumina layer on the wafer substrate at an electronic lapping guide site;
depositing a first metal gap layer on the wafer substrate including the first shield layer of the sensing structure and the first alumina layer at the electronic lapping guide site;
depositing a sensor material layer on the first metal gap layer to form the sensing structure;
removing the first metal gap layer and the sensor material layer from the electronic lapping guide site;
depositing a second alumina layer at the electronic lapping guide site;
patterning, by photolithography, the sensing element of the sensing structure, the sensing element comprising a sensing element front edge, and a front flux guide that comprises a front flux guide back edge, the sensing element front edge and the front flux guide back edge sharing a common interface that defines an interface plane normal to the surface of the wafer substrate, the front flux guide having a front flux guide length normal to the interface plane;
depositing a third alumina layer on the wafer substrate after the patterning of the sensing element;
depositing a flux guide material on the wafer substrate; and
patterning, by photolithography, the flux guide material to produce the front flux guide and the electronic lapping guide, the electronic lapping guide positioned on the surface of the wafer substrate at the electronic lapping guide site, the electronic lapping guide comprising a conductive material adapted to attach to two electrical leads for measuring a resistance through the conductive material, the conductive material comprising a conductive material back edge aligned with the interface plane, the resistance of the conductive material being inversely proportional to a conductive material length normal to the interface plane.
2. The method of claim 1 , further comprising:
lapping the wafer substrate in a lapping plane parallel to the interface plane to decrease the front flux guide length and the conductive material length.
3. The method of claim 1 , further comprising:
measuring the resistance of the conductive material until the resistance reaches a calculated value associated with a desired stripe height of the sensing element.
4. The method of claim 1 , wherein the sensing element comprises a spin valve sensor.
5. The method of claim 1 , wherein the sensing element comprises a tunnel junction sensor.
6. The method of claim 1 , wherein the electronic lapping guide and the front flux guide are formed from a same material.
7. The method of claim 1 , wherein the electronic lapping guide and the sensing element are formed concurrently in a single photolithography step.
8. The method of claim 1 , wherein the conductive material back edge of the electronic lapping guide is aligned to the front flux guide back edge.
9. The method of claim 1 , wherein the conductive material back edge of the electronic lapping guide is aligned to the sensing element front edge.
10. The method of claim 1 , further comprising: depositing leads for the electronic lapping guide on the wafer substrate.