IP Library Granted Patent US 8,049,472
Granted Patent B2
US 8,049,472 · App. 12/463,388 · Granted Nov 1, 2011

Single inductor multiple output switching devices

Assignee: Cosmic Circuits Private Limited
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Quick Facts
Patent No.
US 8,049,472
App. No.
12/463,388
Granted
Nov 1, 2011
Kind
B2
Abstract

Single inductor multiple output (SIMO) switching devices with efficient regulating circuits. The SIMO switching device includes a plurality of time division multiplexing (TDM) switches for switching current through an inductor of the SIMO switching device. The plurality of TDM switches produces a plurality of outputs. The SIMO switching device further includes an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the plurality of outputs; a time slot generation circuit for controlling the plurality of TDM switches according to the calculated error; and a pulse width modulation (PWM) control circuit operatively coupled to the time slot generation circuit for controlling a plurality of PWM switches of a switching stage of the SIMO switching device in a continuous conduction mode (CCM) of operation. The PWM switches are controlled according to the time slots generated by the time slot generation circuit.

Claims (34)

1. A single inductor multiple output switching device comprising:

a plurality of time division multiplexing switches for switching current through an inductor of the single inductor multiple output switching device, the plurality of time division multiplexing switches producing a plurality of outputs;

an error calculation circuit operatively coupled to the plurality of outputs for determining a calculated error from the errors of plurality of outputs, based on a difference of the errors of the outputs if the errors are different, which senses a change in output voltages of the plurality of outputs;

a time slot generation circuit that generates a plurality of time slots for controlling the plurality of time division multiplexing switches according to the calculated error; and

a pulse width modulation control circuit operatively coupled to the time slot generation circuit for controlling, according to the time slot, a plurality of pulse width modulation switches of a switching stage of the single inductor multiple output switching device capable of operating in a continuous conduction mode of operation.

2. The single inductor multiple output switching device of claim 1 , wherein the error calculation circuit comprises a plurality of amplifiers for comparing errors of the plurality of outputs that determines the calculated error.

3. The single inductor multiple output switching device of claim 1 , wherein the time slot generation circuit comprises a plurality of comparators for comparing the calculated error with a time reference signal that generates the plurality of time slots.

4. The single inductor multiple output switching device of claim 1 , wherein the pulse width modulation control circuit comprises a plurality of ramp generators that generate a plurality of ramp signals from the time information of the calculated error; and a plurality of comparators that compare the errors of plurality of outputs with a plurality of ramp signals.

5. The single inductor multiple output switching device of claim 1 , wherein the pulse width modulation control circuit controls the plurality of pulse width modulation switches such that current in the inductor is ramped up and ramped down for each of the plurality of time slots thereby minimizing cross regulation of the plurality of outputs.

6. The single inductor multiple output switching device of claim 5 , wherein a peak current level in the inductor is minimized.

7. The single inductor multiple output switching device of claim 1 , wherein the plurality of outputs comprises two outputs.

8. The single inductor multiple output switching device of claim 7 , wherein the calculated error is determined by dividing a total time period equally into two time slots if the errors of the two outputs are equal.

9. The single inductor multiple output switching device of claim 1 , wherein the plurality of outputs comprises three outputs.

10. The single inductor multiple output switching device of claim 9 , wherein the calculated error is determined by performing at least one of a sequential search and a binary search of the errors of the three outputs.

11. The single inductor multiple output switching device of claim 1 , wherein the plurality of outputs comprises four outputs.

12. The single inductor multiple output switching device of claim 11 , wherein the calculated error is determined by performing at least one of a sequential search and a binary search of the errors of the four outputs.

13. A method for regulating a single input multiple output switching device operating in continuous conduction mode comprising:

determining a calculated error from errors of a plurality of outputs based on a difference of the errors of the outputs if the errors are different in an error calculation circuit which senses a change in output voltages of the plurality of outputs in the single input multiple output switching device, the plurality of outputs produced by a plurality of time division multiplexing switches;

generating a time slot according to the calculated error; and

switching current through an inductor of the device dynamically according to the time slot, a plurality of pulse width modulation switches of a switching stage of the single input multiple output switching device being capable of operating in a continuous conduction mode of operation.

14. The method of claim 13 and further comprising:

converting the calculated error into time information with a counter and a clock signal of known time period; and

generating the time slot according to the time information.

15. The method of claim 14 and further comprising:

generating a plurality of ramp signals from the time information, and wherein generating a time slot comprises comparing the errors of the plurality of outputs with the plurality of ramp signals.

16. The method of claim 13 , wherein determining a calculated error comprises performing at least one of a sequential search and a binary search of the errors of the outputs.

17. The method of claim 13 and further comprising sharing loop components of a pulse width modulation control loop and a time division multiplexing control loop of the single input multiple output switching device.

18. A single inductor multiple output switching device comprising:

a plurality of time division multiplexing switches for switching current through an inductor of the single inductor multiple output switching device, the plurality of time division multiplexing switches producing at least three outputs;

an error calculation circuit operatively coupled to the outputs for determining a calculated error from errors of the outputs by performing at least one of a sequential search and a binary search of the errors, which senses a change in output voltages of the outputs;

a time slot generation circuit that generates a plurality of time slots for controlling the plurality of time division multiplexing switches according to the calculated error; and

a pulse width modulation control circuit operatively coupled to the time slot generation circuit for controlling, according to the time slot, a plurality of pulse width modulation switches of a switching stage of the single inductor multiple output switching device capable of operating in a continuous conduction mode of operation.

19. The single inductor multiple output switching device of claim 18 wherein the time slot generation circuit comprises a plurality of comparators for comparing the calculated error with a time reference signal that generates the plurality of time slots.

20. The single inductor multiple output switching device of claim 18 , wherein the pulse width modulation control circuit comprises a plurality of ramp generators that generate a plurality of ramp signals from time information of the calculated error; and a plurality of comparators that compare the errors of plurality of outputs with a plurality of ramp signals.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 17, 2026
From: CIREL SYSTEMS PRIVATE LIMITED
To: MICRON SEMICONDUCTOR ASIA OPERATIONS PTE. LTD.
Reel/Frame 075422/0907 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 19, 2013
From: COSMIC CIRCUITS PRIVATE LIMITED
To: CIREL SYSTEMS PRIVATE LIMITED
Reel/Frame 031242/0280 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 13, 2009
From: EASWARAN, PRAKASH; GHAYAL, RUPAK; HARESAMUDRAM, RAGHAVENDRA RAO
To: COSMIC CIRCUITS PRIVATE LIMITED
Reel/Frame 022674/0644 →
Priority Claims (1)
IN 1830/CHE/2008 · Jul 29, 2008 · national
Continuity (1)
Related Publication 20100026267A1 · Feb 4, 2010