Semiconductor storage device

1. A semiconductor storage apparatus to be coupled with a system bus to receive a write request accompanied with first and second sectors of data, comprising:

a plurality of nonvolatile semiconductor memories which store said first and second sectors of data therein; and

a control module to be coupled with said system bus, and coupled with said plurality of nonvolatile semiconductor memories,

wherein said control module sends a first erase command to one of said plurality of nonvolatile semiconductor memories to initiate a first internal erase operation of data within said one of said plurality of nonvolatile semiconductor memories,

wherein, after said first erase command has been sent, said control module sends a second erase command to another of said plurality of nonvolatile semiconductor memories, different from said one of said plurality of nonvolatile semiconductor memories to which said first erase command was sent, to initiate a second internal erase operation of data within said other of said plurality of nonvolatile semiconductor memories while said one of said plurality of nonvolatile semiconductor memories is still performing said first internal erase operation responsive to said first erase command; and

wherein the control module operates to send the first and second erase commands to predetermined ones of the nonvolatile semiconductor memories responsive to a management table internal to the control module, wherein the management table is capable of storing entries indicating predetermined portions of a plurality of the nonvolatile semiconductor memories to be subsequently erased, wherein the entries in the management table control the order in which the predetermined portions of the plurality of the nonvolatile semiconductor memories are erased, wherein the entries in the management table are updated in response to completion of each of the first and second internal erase operations.

2. A semiconductor storage apparatus according to claim 1 , further comprising:

a buffer memory, coupled commonly with said plurality of nonvolatile semiconductor memories, which holds said first and second sectors of data as write data to be written into said plurality of nonvolatile semiconductor memories,

wherein said control module responds to said write request, carries out read operations of said first and second sectors of data as said write data from said buffer memory and carries out write operations of said first and second sectors of data as said write data read out from said buffer memory into said plurality of nonvolatile semiconductor memories, wherein said write operations into said plurality of nonvolatile semiconductor memories are controlled by sending a first write command from said control module to one of said plurality of nonvolatile semiconductor memories and by sending a second write command from said control module to another of said plurality of nonvolatile semiconductor memories, different from said one to which said first write command has been sent, while said one of said plurality of nonvolatile semiconductor memories is still performing a write operation responsive to said first write command.

3. A semiconductor storage apparatus according to claim 2 , wherein each of said plurality of nonvolatile semiconductor memories is comprised of a flash memory semiconductor chip.

4. A semiconductor storage apparatus according to claim 2 , wherein said buffer memory has a storage memory capacity corresponding to a plurality of sectors in units of 512 bytes which is a sector capacity of a standard disk.

5. A semiconductor storage apparatus according to claim 2 , wherein said control module includes a processor.

6. A semiconductor storage apparatus according to claim 5 , wherein said control module further includes an address controller.

7. A semiconductor storage apparatus according to claim 2 ,

wherein each of said plurality of nonvolatile semiconductor memories is comprised of a flash memory semiconductor chip, and

wherein said buffer memory has a storage memory capacity corresponding to a plurality of sectors in units of 512 bytes which is a sector capacity of a standard disk.

8. A semiconductor storage apparatus according to claim 7 , wherein said control module includes a processor.

9. A semiconductor storage apparatus according to claim 8 , wherein said control module further includes an address controller.

10. A semiconductor storage apparatus according to claim 2 ,

wherein each of said plurality of nonvolatile semiconductor memories is comprised of a flash memory semiconductor chip, and

wherein said buffer memory has a storage memory capacity for storing a plurality of sectors of data.

11. A semiconductor storage apparatus according to claim 10 , wherein said control module includes a processor.

12. A semiconductor storage apparatus according to claim 11 , wherein said control module further includes an address controller.

13. A semiconductor storage apparatus according to claim 1 , wherein each of said plurality of nonvolatile semiconductor memories is comprised of a flash memory semiconductor chip.

14. A semiconductor storage apparatus according to claim 1 , wherein said control module includes a processor.

15. A semiconductor storage apparatus according to claim 14 , wherein said control module further includes an address controller.

16. A semiconductor storage apparatus to be coupled with a system bus comprising:

a plurality of nonvolatile semiconductor memories which write data from said system therein in sector units and erase said data in block units, said each block including a plurality of said sectors; and

a control module to be coupled with said system bus, and coupled with said plurality of nonvolatile semiconductor memories,

wherein said control module sends a first erase command to one of said plurality of nonvolatile semiconductor memories to initiate a first internal erase operation of data in said block units within said one of said plurality of nonvolatile semiconductor memories,

wherein, after said first erase command has been sent, said control module sends a second erase command to another of said plurality of nonvolatile semiconductor memories, different from said one of said plurality of nonvolatile semiconductor memories to which said first erase command was sent, to initiate a second internal erase operation of data in said block units within said other of said plurality of nonvolatile semiconductor memories while said one of said plurality of nonvolatile semiconductor memories is still performing said first internal erase operation responsive to said first erase command; and

wherein the control module operates to send the first and second erase commands to predetermined ones of the nonvolatile semiconductor memories responsive to a management table internal to the control module, wherein the management table is capable of storing entries indicating predetermined portions of a plurality of the nonvolatile semiconductor memories to be subsequently erased, wherein the entries in the management table control the order in which the predetermined portions of the plurality of the nonvolatile semiconductor memories are erased, wherein the entries in the management table are updated in response to completion of each of the first and second internal erase operations.

17. A semiconductor storage apparatus according to claim 16 , wherein said control module carries out a status polling operation in an order of said nonvolatile semiconductor memories to which said control module sent said erase commands, after said control module sent said erase commands to all of said nonvolatile semiconductor memories.