IP Library Patent Application 12481467
Patent Application
App. No. 12/481,467

LIQUID CRYSTAL DISPLAY AND DISPLAY SYSTEM COMPRISING THE SAME

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Quick Facts
Patent No.
US None
App. No.
12/481,467
Abstract

A liquid crystal display and a display system including the same are provided in one or more embodiments. For example, a liquid crystal display may include for an embodiment a bi-directional channel, a memory in which driving signal generation data including information required to generate a plurality of driving signals and EDID (Extended Display Identification Data) are stored, and a timing controller which receives the driving signal generation data and the EDID from the memory and transmits the EDID to the outside through the bi-directional channel. The driving signal generation data and the EDID may be transmitted from the memory to the timing controller via a single interface. A first time period during which the driving signal generation data is transmitted may not overlap with a second time period during which the EDID is transmitted.

Claims (27)

1 . A liquid crystal display comprising:

a bi-directional channel;

a memory in which driving signal generation data including information required to generate a plurality of driving signals and EDID (Extended Display Identification Data) are stored; and

a timing controller which receives the driving signal generation data and the EDID from the memory and transmits the EDID to the outside through the bi-directional channel, wherein the driving signal generation data and the EDID are transmitted from the memory to the timing controller via a single interface, and a first time period during which the driving signal generation data is transmitted does not overlap with a second time period during which the EDID is transmitted.

2 . The liquid crystal display of claim 1 , wherein the timing controller transmits the EDID in a DisplayPort interfacing format.

3 . The liquid crystal display of claim 2 , wherein the timing controller includes a first communication module receiving the EDID and outputting the EDID to the outside, and a second communication module receiving driving signal generation data and outputting a timing controller start signal for starting the operation of the timing controller.

4 . The liquid crystal display of claim 3 , wherein the timing controller receives the driving signal generation data and then receives the EDID.

5 . The liquid crystal display of claim 4 , wherein if a power supply voltage is applied to the timing controller so that the bi-directional channel is connected to the timing controller, the first communication module outputs a first ready signal, and the second communication module, in response to the first ready signal, receives from the memory the driving signal generation data and outputs a first done signal and a second ready signal, the first communication module receiving the EDID from the memory in response to the second ready signal.

6 . The liquid crystal display of claim 5 , wherein the first communication module outputs the EDID to the outside prior to outputting a second done signal, and the second communication module outputs the timing controller start signal in response to the second done signal.

7 . The liquid crystal display of claim 3 , wherein in the timing controller, after the first communication receives the EDID, the second communication module receives the driving signal generation data from the memory.

8 . The liquid crystal display of claim 7 , wherein if a power supply voltage is applied to the timing controller so that the one-way channel and the bi-directional channel are connected to the timing controller, the first communication module receives the EDID from the memory, transmits the EDID to the outside through the bi-directional channel, and outputs a first ready signal; and

wherein the second communication module, in response to the first ready signal, receives from the memory the driving signal generation data, outputs a second done signal, and outputs, in response to a first done signal and the second done signal, a timing controller start signal.

9 . The liquid crystal display of claim 1 , wherein the memory is an EEPROM (Electrically Erasable Programmable Read-Only Memory).

10 . The liquid crystal display of claim 1 , wherein the interface between the memory and the timing controller is an I2C (Inter-Integrated Circuit).

11 . The liquid crystal display of claim 1 , further comprising a one-way channel providing one of a video signal and an audio signal, or a combination thereof.

12 . A display system comprising:

a bi-directional channel;

a memory in which driving signal generation data for generating a plurality of control signals and EDID (Extended Display Identification Data) are stored;

a liquid crystal display including a timing controller which receives the driving signal generation data and the EDID from the memory and transmits the EDID to the outside through the bi-directional channel, wherein the driving signal generation data and the EDID are transmitted from the memory to the timing controller via a single interface, and a first time period during which the driving signal generation data is transmitted does not overlap with a second time period during which the EDID is transmitted; and

a host device receiving the EDID from the liquid crystal display.

13 . The display system of claim 12 , further comprising a transmission cable connected between the liquid crystal display and the host device, wherein the liquid crystal display transmits the EDID through the transmission cable in a DisplayPort interfacing format.

14 . The display system of claim 13 , wherein the liquid crystal display includes a first communication module, and the transmission cable includes an auxiliary channel as a bi-directional channel, and a main link as a one-way channel, the first communication module transmitting the EDID to the host device through the auxiliary channel, and the host device transmitting one of a video signal and an audio signal, or a combination thereof to the liquid crystal display through the main link.

15 . The display system of claim 12 , wherein the timing controller includes a first communication module receiving the EDID and outputting the EDID to the outside, and a second communication module receiving driving signal generation data and outputting a timing controller start signal for starting operation of the timing controller.

16 . The display system of claim 15 , wherein if a power supply voltage is applied to the timing controller so that the bi-directional channel is connected to the timing controller, the first communication module outputs a first ready signal; the second communication module, in response to the first ready signal, receives from the memory the driving signal generation data, and outputs a first done signal and a second ready signal; the first communication module receives the EDID from the memory in response to the second ready signal; the first communication module outputs the EDID to the outside first, prior to outputting a second done signal; and the second communication module outputs the timing controller start signal in response to the second done signal.

17 . The display system of claim 15 , wherein if a power supply voltage is applied to the timing controller so that the bi-directional channel is connected to the timing controller, the first communication module receives the EDID from the memory, transmits the EDID to the outside through the bi-directional channel and outputs a first ready signal; and the second communication module, in response to a first done signal, receives from the memory the driving signal generation data, outputs a second done signal, and outputs, in response to the first and second done signals, a timing controller start signal.

18 . The display system of claim 12 , wherein the liquid crystal display receives one of a video signal and an audio signal, or a combination thereof from the host device.

19 . The display system of claim 12 , wherein the memory is an EEPROM (Electrically Erasable Programmable Read-Only Memory).

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 23, 2012
From: SAMSUNG ELECTRONICS CO., LTD.
To: SAMSUNG DISPLAY CO., LTD.
Reel/Frame 029009/0076 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 9, 2009
From: KIM, YONG-BUM; LEE, SANG-KEUN
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 022803/0018 →