SiGe MOSFET semiconductor device with sloped source/drain regions
View Patent ↗Performance of a semiconductor device having a MIS transistor is improved. A semiconductor device includes: a pair of source/drain regions each formed by stacking a semiconductor layer on a main surface of a silicon substrate; a sidewall insulating film covering each sidewall of the source/drain regions; a gate electrode arranged so as to interpose a gate insulating film on the main surface of the silicon substrate at a position sandwiched by the sidewall insulating films in a plane; and extension regions formed to extend from a portion below and lateral to the gate electrode to a portion below and lateral to each of the source/drain regions, wherein a sidewall of the sidewall insulating film being adjacent to the gate insulating film and the gate electrode has an inclination of a forward tapered shape.
1. A semiconductor device comprising:
(a) a pair of source/drain regions formed of a semiconductor layer and arranged on a main surface of a semiconductor substrate at a predetermined distance therebetween;
(b) sidewall insulating films arranged to be adjacent to sidewalls of the source/drain regions;
(c) a gate electrode arranged at a position between the pair of the source/drain regions and sandwiched by the sidewall insulating films via an interposed gate insulating film, in a cross-sectional view; and
(d) first semiconductor regions formed in regions each extending from respective a position below and lateral to the gate electrode to a position overlapping with an end portion of a corresponding one of the source/drain regions in the cross-sectional view, wherein
the first semiconductor regions are formed to be electrically connected to the source/drain regions,
impurity concentrations of the first semiconductor regions are lower than impurity concentrations of the source/drain regions,
each of said sidewalls of the source/drain regions has a shape such that a height thereof from the semiconductor substrate becomes lower toward an end portion thereof, and
each of the sidewall insulating films has a sidewall which is adjacent to the gate insulating film and the gate electrode, and which has a shape such that a height thereof from the semiconductor substrate becomes lower toward an end portion thereof,
a trench-shaped recess portion is disposed at a position between the pair of source/drain regions and sandwiched by the sidewall insulating films in the cross-sectional view,
the gate insulating film and the gate electrode are formed to cover the recess portion,
a dielectric constant of the gate insulating film is higher than that of silicon oxide,
the gate electrode is formed of a conductor film mainly made of titanium nitride, molybdenum nitride, or hafnium silicide, and
each of the source/drain regions is formed of a semiconductor layer mainly made of a mixed crystal of silicon and germanium.
2. The semiconductor device according to claim 1 , wherein
a partial or whole surface of each of the source/drain regions is formed of a metal silicide layer.
3. The semiconductor device according to claim 2 , wherein
each of the sidewall insulating films has a stacked layer structure formed of a first sidewall insulating film and a second sidewall insulating film arranged in this order from a lower layer, and
a dielectric constant of the first sidewall insulating film is equal to or lower than a dielectric constant of the second sidewall insulating film.
4. The semiconductor device according to claim 3 , wherein
the semiconductor substrate includes an SOI layer, a buried insulating layer, and a supporting substrate arranged in this order from a side of the main surface, and
the configurations of (a) to (d) are formed on the SOI layer of the semiconductor substrate.
5. The semiconductor device according to claim 4 , wherein
a thickness of the SOI layer of the semiconductor substrate is 4 to 100 nm.