Thin film transistor array for a liquid crystal display device and related manufacturing and operation methods
View Patent ↗In one embodiment of an invention concerning liquid crystal display devices, a first pixel electrode of a thin film transistor (TFT) array substrate may overlap a slit of a second pixel electrode of the TFT array substrate but not overlap another slit of the second pixel electrode. This may help induce a multi-domain electric field without having to precisely position a common electrode of a color filter substrate and the TFT array substrate. This may prevent position errors, enhance display quality, produce a wider viewing angle, and lower color shift sometimes associated with conventional liquid crystal display devices and methods.
1. A liquid crystal (LC) display device, comprising:
a substrate, an electrode insulating layer, and an LC layer;
a first plurality of pixel electrodes, including a first pixel electrode, formed between the substrate and the electrode insulating layer;
a second plurality of pixel electrodes, including a second pixel electrode, formed between the LC layer and the electrode insulating layer;
a pixel region including the first and second pixel electrodes and a storage capacitor electrode, the second pixel electrode including first and second enclosed slits, wherein the first slit does not overlap the first pixel electrode and the second slit overlaps the first pixel electrode, and the storage capacitor electrode partially overlaps the first slit and the second slit; and
a first auxiliary storage metallic layer and a second auxiliary storage metallic layer disposed on the storage capacitor electrode, wherein the first auxiliary storage metallic layer overlaps the second slit and the second auxiliary storage metallic layer overlaps the first slit.
2. The device of claim 1 , wherein the substrate includes data lines and gate lines that overlap to form a plurality of pixel regions including the pixel region, each pixel region including a first thin film transistor (TFT) to electrically connect to a first gate line included in the gate lines and a first data line included in the data lines.
3. The device of claim 2 , wherein the gate lines and the data lines include a first material different from a second material included in the first pixel electrodes and the second pixel electrodes.
4. The device of claim 2 , wherein the pixel region includes one of the first TFTs and a second TFT, the first pixel electrode to electrically connect to the one of the first TFTs and the second pixel electrode to electrically connect to the second TFT.
5. The device of claim 2 , wherein first pixel electrode directly contacts a gate insulating layer formed on one of the first TFTs.
6. The device of claim 2 , wherein the first pixel electrode includes a total area generally between ⅓ and ½ of a total area of the pixel region.
7. The device of claim 1 , wherein the first pixel electrode is formed in a “V” shape.
8. The device of claim 1 , further comprising an insulating layer between the substrate and the first plurality of pixel electrodes.
9. The device of claim 1 , wherein the first pixel electrode is to electrically connect to a first voltage level, the second pixel electrode is to electrically connect to a second voltage level, and the first voltage level is to be greater than the second voltage level.