Flash memory system startup operation
View Patent ↗Multiple copies of firmware code for controlling operation of a non-volatile flash memory system are stored at different suitable locations of the flash memory of a memory system. A map of addresses of these locations is also stored in the flash memory. Upon initialization of the memory system, boot code stored in the memory controller is executed by its microprocessor to reference the address map and load one copy of the firmware from the flash memory into a controller memory, from which it may then be executed by the microprocessor to operate the memory system to store and retrieve user data. An error correction code (ECC) is used to check the data but the best portions of the two or more firmware copies stored in the flash memory are used to reduce the need to use ECC. The firmware code may be stored in the flash memory in two-states when user data is stored in the same memory in more than two-states.
1. A method of initiating a data storage system having a microprocessor, at least first and second copies of firmware code stored in different locations of a non-volatile memory therein, a read-only-memory (ROM) containing a microprocessor accessible boot code and a working memory for storing firmware code for execution by the processor, the method comprising:
storing each of the first and second firmware copies as units of data that individually have an error-correction-code (ECC) calculated therefrom and stored in association therewith,
executing the boot code to transfer a first copy of the firmware from the non-volatile memory to the working memory,
identifying any bit errors in the transferred first copy of the firmware code, and therefore the data units in which they occur,
if any of the identified bit errors are correctable with the ECC, correcting the correctable erroneous bits,
if any of the identified bit errors are uncorrectable with the ECC, reading into the working memory a portion of the second copy of the fi code including the data unit containing the uncorrectable bits in place of the corresponding data unit of the first copy, and
executing an error free copy of the firmware code from the working memory.
2. The method of claim 1 , wherein identifying any bit errors in the transferred first copy includes passing the firmware units through ECC circuitry in succession as they are being transferred from the non-volatile memory to the working memory, and comparing the calculated ECCs with ECCs previously stored with the first copy of the firmware data.
3. The method of claim 2 , wherein correcting the erroneous bits includes the microprocessor executing an error correction algorithm of the boot code to correct erroneous bits.
4. The method of claim 1 , which, prior to executing the boot code to transfer a first copy of the firmware from the non-volatile memory to the working memory, additionally comprises:
initially accessing a plurality of fixed locations in the non-volatile memory one at a time until an initialization memory map is discovered to be stored at at least one of the plurality of fixed locations and that contains addresses of the different locations of the non-volatile memory wherein said at least first and second copies of firmware code are stored,
reading data of the initialization memory map to obtain said addresses, and
thereafter accessing the first copy of the firmware code within the non-volatile memory.
5. The method of claim 4 , which additionally comprises:
identifying any bit errors in the data read from the initialization memory map,
if bit errors in the data read are identified that are correctable, correcting the erroneous bits, and
if bit errors in the data read are identified that are not correctable, re-reading the data of the initialization memory map under different conditions.
6. The method of claim 1 , additionally comprising:
identifying any bit errors in the portion of the second copy of the firmware code that is read into the working memory, and
if bit errors identified in the portion of the second copy of the firmware code that is read into the working memory are not correctable, repeating the reading of the portion of the second copy of the firmware code under conditions that tend to reduce the number of bit errors in the portion of the second copy.
7. The method of claim 1 , additionally comprising, prior to executing the boot code to transfer a first copy of the firmware from the non-volatile memory to the working memory, checking the state of a firmware present flag that is set when firmware is stored in the non-volatile memory and continuing to execute the boot code to transfer the first copy of the firmware from the non-volatile memory to the working memory only when the firmware present flag is set.
8. The method of claim 1 , additionally comprising, in response to identifying bit errors equal to or greater than a predefined number of one or more, setting a housekeeping flag associated with the locations of the non-volatile memory from which the erroneous bits of the first copy of the firmware are stored.
9. The method of claim 8 , additionally comprising, in response to the housekeeping flag being set, of correcting the erroneous data of the first copy of the firmware stored in the non-volatile memory after an error free copy of the firmware code has been read into the working memory.
10. The method of claim 9 , wherein correcting the erroneous data of the first copy of the firmware includes rewriting the corrected first copy of the firmware into the non-volatile memory.
11. The method of claim 10 , wherein rewriting the corrected first copy of the firmware includes re-writing the corrected first copy in a different location within the non-volatile memory than it was originally stored.
12. The method of claim 9 , wherein correcting the erroneous data of the first copy of firmware includes transfer of good data from the second copy of firmware code.