Method and apparatus for generating reticle data

1. A computer-implemented method for generating reticle data for forming a reticle, the method comprising:

recognizing a non-rectangular-shaped non-layout region free from main chips in a process pattern, wherein each non-rectangular-shaped non-layout region includes an inter-wiring insulation layer but does not include a metal line;

arranging a scribe region in the non-rectangular-shaped non-layout region to divide the non-rectangular-shaped non-layout region into a plurality of rectangular non-layout regions;

generating a dummy pattern at a location corresponding to the scribe region between the plurality of rectangular non-layout regions, the scribe region being a linear segment that includes an end point at a certain vertex of the non-rectangular-shaped non-layout region and is orthogonal to a scribe line surrounding the non-rectangular-shaped non-layout region; and

generating a dummy pattern in each of the rectangular non-layout regions to use as a dummy chip, wherein each rectangular non-layout region includes the metal line in the inter-wiring insulation layer after the dummy pattern is generated.

2. The method according to claim 1 , wherein the generated dummy pattern includes at least one layer of metal wiring.

3. The method according to claim 1 , wherein the generated dummy pattern and a main chip includes the similar wiring layer.

4. The method according to claim 1 , wherein said generating scribe data includes:

determining whether or not marks are laid out in a scribe region in the dummy chips; and

laying out the marks within a region of the dummy chip when the marks are not laid out in the scribe region.

5. The method according to claim 1 , wherein said dividing the non-layout region into a plurality of rectangular non-layout regions includes:

dividing the non-layout region in the similar direction as in which extends a wide one of scribe regions, which are used for cutting out and separating the main chips.

6. A wafer exposed and processed using a reticle generated by employing the method for generating reticle data according to claim 1 .

7. The method according to claim 1 , wherein:

the reticle is a multi-chip reticle adapted to expose main chips having different dimensions; and

the non-layout region is adjacent to and formed between the main chips having different dimensions.

8. A method for generating reticle data, the method comprising:

detecting a non-rectangular-shaped non-layout region in a process pattern, wherein each non-rectangular-shaped non-layout region includes an inter-wiring insulation layer but does not include a metal line;

arranging a linear scribe region in the non-rectangular-shaped non-layout region to divide the non-rectangular-shaped non-layout region into a plurality of rectangular non-layout regions; and

arranging, by a computer, a dummy pattern in the non-rectangular-shaped non-layout region at a location corresponding to the linear scribe region between the plurality of rectangular non-layout regions to generate the reticle data, the scribe region being a linear segment that includes an end point at a certain vertex of the non-rectangular-shaped non-layout region and is orthogonal to a scribe line surrounding the non-rectangular-shaped non-layout region, wherein each rectangular non-layout region includes the metal line in the inter-wiring insulation layer after the dummy pattern is generated.