IP Library Granted Patent US 8,190,935
Granted Patent B2
US 8,190,935 · App. 12/487,029 · Granted May 29, 2012

Information processing apparatus and method of controlling operating frequency of an information processing apparatus

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 8,190,935
App. No.
12/487,029
Granted
May 29, 2012
Kind
B2
Abstract

An information processing apparatus has a CPU, a clock supply unit configured to supply a clock signal, a CPU idle ratio obtaining unit configured to obtain the idle ratio of the CPU at each predetermined time, a clock control unit configured to determine an operating frequency of the clock signal, and a DMA transfer unit configured to execute a DMA transfer in synchronization with the clock signal supplied from the clock supply unit. The clock control unit controls the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is not being executed, whereas the clock control unit controls the operating frequency of the clock signal to a predetermined frequency if the DMA transfer is being executed.

Claims (50)

1. An information processing apparatus comprising:

a CPU;

a clock supply unit configured to supply a clock signal;

a CPU idle ratio obtaining unit configured to obtain the idle ratio of the CPU at each predetermined time;

a clock control unit configured to determine an operating frequency of the clock signal; and

a DMA transfer unit configured to execute a DMA transfer in synchronization with the clock signal supplied from the clock supply unit,

wherein the clock control unit controls the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is not being executed, whereas the clock control unit controls the operating frequency of the clock signal to a predetermined frequency if the DMA transfer is being executed.

2. The information processing apparatus according to claim 1 , wherein the clock control unit determines the operating frequency based on the idle ratio of the CPU obtained by the CPU idle ratio obtaining unit even if the DMA transfer is being executed and controls the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is finished.

3. The information processing apparatus according to claim 1 , wherein the clock control unit only controls the operating frequency of the clock signal to the predetermined frequency if the information processing apparatus is operated by a user.

4. The information processing apparatus according to claim 3 , further comprising a display unit,

wherein the clock control unit determines that the information processing apparatus is operated by the user if the display unit is being lit.

5. The information processing apparatus according to claim 3 further comprising an input unit accepted an operation,

wherein the clock control unit determines that the information processing apparatus is operated by the user if the DMA transfer is executed based on the operation accepted by the input unit.

6. The information processing apparatus according to claim 3 further comprising an body of openable/closable folding type,

wherein the clock control unit determines that the information processing apparatus is operated by the user if the body is opened.

7. The information processing apparatus according to claim 1 , wherein:

the operating frequency shifts stepwise between a plurality of clock levels to which a predetermined operating frequency is allocated; and

the clock control unit controls the clock level to the clock level to which a maximum operating frequency is allocated if the DMA transfer is being executed.

8. An information processing apparatus comprising:

a CPU;

a clock supply unit configured to supply a clock signal;

a CPU idle ratio obtaining unit configured to obtain the idle ratio of the CPU at each predetermined time;

a clock control unit configured to determine an operating frequency of the clock signal; and

a DMA transfer unit configured to execute a DMA transfer in synchronization with the clock signal supplied from the clock supply unit,

wherein the clock control unit controls the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is not being executed, whereas the clock control unit controls the operating frequency of the clock signal to a predetermined frequency or higher regardless of the idle ratio of the CPU if the DMA transfer is started.

9. The information processing apparatus according to claim 8 , wherein the clock control unit only controls the operating frequency of the clock signal to the predetermined frequency if the information processing apparatus is operated by a user.

10. The information processing apparatus according to claim 8 , wherein the clock control unit determines the operating frequency based on the idle ratio of the CPU obtained by the CPU idle ratio obtaining unit even if the DMA transfer is being executed and controls the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is finished.

11. The information processing apparatus according to claim 8 , wherein the clock control unit controls the operating frequency of the clock signal to the predetermined frequency or higher until a predetermined time passes after the completion of the DMA transfer.

12. A method of controlling an operating frequency of an information processing apparatus, comprising the steps of:

preparing the information processing apparatus configured to execute a DMA transfer in synchronization with a clock signal;

obtaining the idle ratio of a CPU at each predetermined time;

determining the operating frequency of the clock signal based on the idle ratio of the CPU;

determining whether or not that the DMA transfer is being executed; and

controlling the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is not being executed, whereas controlling the operating frequency of the clock signal to a predetermined frequency if the DMA transfer is being executed.

13. The method of controlling the operating frequency of the information processing apparatus according to claim 12 , wherein:

the step of determining comprises determining the operating frequency based on the idle ratio of the CPU obtained even if the DMA transfer is being executed; and

the step of determining comprises controlling the operating frequency of the clock signal to the operating frequency determined based on the idle ratio of the CPU if the DMA transfer is finished.

14. The method of controlling the operating frequency of the information processing apparatus according to claim 12 , further comprising the step of determining whether or not that the information processing apparatus is operated by a user,

wherein the step of controlling comprises only controlling the operating frequency of the clock signal to the predetermined frequency if the information processing apparatus is operated by a user.

15. The method of controlling the operating frequency of the information processing apparatus according to claim 14 , further comprising the step of preparing the information processing apparatus provided with a display unit,

wherein the step of determining comprises determining that the information processing apparatus is operated by the user if the display unit is being lit.

16. The method of controlling the operating frequency of the information processing apparatus according to claim 14 , further comprising the step of preparing the information processing apparatus provided with an input unit accepted an operation,

wherein the step of determining comprises determining that the information processing apparatus is operated by the user if the DMA transfer is executed based on the operation accepted by the input unit.

17. The method of controlling the operating frequency of the information processing apparatus according to claim 14 , further comprising the step of preparing the information processing apparatus provided with an body of openable/closable folding type,

wherein the step of determining comprises determining that the information processing apparatus is operated by the user if the body is opened.

18. The method of controlling the operating frequency of the information processing apparatus according to claim 12 , further comprising the step of controlling the operating frequency to the predetermined frequency or higher regardless of the idle ratio of the CPU if the DMA transfer is started.

19. The method of controlling the operating frequency of the information processing apparatus according to claim 12 , further comprising the step of controlling the operating frequency to the predetermined frequency or higher until a predetermined time passes after the completion of the DMA transfer.

20. The method of controlling the operating frequency of the information processing apparatus according to claim 12 , wherein:

the operating frequency shifts stepwise between a plurality of clock levels to which a predetermined operating frequency is allocated; and

the step of controlling comprises controlling the clock level to the clock level to which a maximum operating frequency is allocated if the DMA transfer is being executed.

Assignments (3)
CHANGE OF NAME Recorded Jan 16, 2013
From: FUJITSU TOSHIBA MOBILE COMMUNICATIONS LIMITED
To: FUJITSU MOBILE COMMUNICATIONS LIMITED
Reel/Frame 029645/0113 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 1, 2010
From: KABUSHIKI KAISHA TOSHIBA
To: FUJITSU TOSHIBA MOBILE COMMUNICATIONS LIMITED
Reel/Frame 025433/0713 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 18, 2009
From: HITAKA, GO; YAMAGISHI, MASAHIRO
To: KABUSHIKI KAISHA TOSHIBA
Reel/Frame 022843/0462 →