Transistor junction diode circuitry systems and methods
View Patent ↗Methods and apparatus for capacitive voltage division are provided, an example apparatus having an input and an output and including a first switched capacitor circuit. In some embodiments, the capacitive voltage divider includes first and second MOSFETs. A first capacitor is coupled between the drain of the first MOSFET and the input to the capacitive voltage divider. A first circuit coupled to the drain of the first MOSFET is configured to pull down the drain of the first MOSFET and thus apply a reverse bias to a first junction diode internal to the first MOSFET between the drain and the bulk of the first MOSFET. A second capacitor is coupled between the source of the first MOSFET and the drain of the second MOSFET. A second circuit is configured to reverse bias a second junction diode between the drain and bulk of the second MOSFET.
1. A capacitive voltage divider having an input and an output, the capacitive voltage divider comprising:
a) a first metal-oxide-semiconductor field-effect transistor (MOSFET) having a bulk, drain and source and having the source and bulk electrically connected to the capacitive voltage divider output;
b) a first capacitor having a first terminal coupled to the drain of the first MOSFET and a second terminal coupled to the input of the capacitive voltage divider;
c) a first circuit coupled to the drain of the first MOSFET, the first circuit configured to apply a reverse bias to a first junction diode internal to the first MOSFET when the first MOSFET is off, the first junction diode being formed between the drain and the bulk of the first MOSFET;
d) a second MOSFET having a bulk, drain and source and having the source and bulk electrically connected to a low potential reference level;
e) a second capacitor having first and second terminals, the first terminal of the second capacitor coupled to the source of the first MOSFET and the second terminal of the second capacitor coupled to the drain of the second MOSFET; and
f) a second circuit, configured to reverse bias a second junction diode between the drain and bulk of the second MOSFET when the second MOSFET is off.
2. The capacitive voltage divider of claim 1 , wherein the first circuit comprises a first resistor and the second circuit comprises a second resistor.
3. The capacitive voltage divider of claim 1 , wherein the first circuit comprises a first resistor and the second circuit comprises circuitry in another circuit stage.
4. The capacitive voltage divider of claim 1 , wherein the first circuit is configured to short the first junction diode in the first MOSFET when the first MOSFET is on.
5. The capacitive voltage divider of claim 1 , wherein the second circuit is configured to short the first junction diode in the second MOSFET when the second MOSFET is on.
6. The capacitive voltage divider of claim 1 , wherein the first MOSFET comprises a p-channel MOSFET and the second MOSFET comprises an n-channel MOSFET.
7. The capacitive voltage divider of claim 6 , wherein the well comprises an n-well.
8. The capacitive voltage divider of claim 1 , wherein one MOSFET is formed in a well of material that is opposite in type to the substrate material.
9. The capacitive voltage divider of claim 1 , further comprising a second switched capacitor circuit.
10. The capacitive voltage divider of claim 9 , further comprising a single well of material that is opposite in type to the substrate material and wherein the well is shared by a first MOSFET and a MOSFET of a second switching circuit.
11. The capacitive voltage divider of claim 10 , wherein the well comprises an n-well.
12. The capacitive voltage divider of claim 9 , wherein a first capacitor in the first switch capacitor circuit and a first capacitor in the second switch capacitor circuit share a single capacitor plate.
13. The capacitive voltage divider of claim 9 , wherein a second capacitor in the first switch capacitor circuit and a second capacitor in the second switch capacitor circuit share a single capacitor plate.
14. The capacitive voltage divider of claim 1 , further comprising a plurality of switched capacitor circuits.