TFT-LCD array substrate and manufacturing method thereof

1. A method for manufacturing a thin film transistor liquid crystal display (TFT-LCD) array substrate comprising:

step 1 of depositing a layer of gate metal thin film on a substrate and patterning the gate metal thin film to form a pattern including a gate line and a gate electrode;

step 2 of depositing sequentially a gate insulating layer, a semiconductor layer, a doped semiconductor layer, and a layer of source/drain metal thin film on the substrate after step 1, and patterning the layers to form patterns including a data line, a source electrode, a drain electrode, and a thin film transistor (TFT) channel region; and

step 3 of depositing a passivation layer on the substrate after step 2, then patterning the passivation layer with a pattern of photoresist as a mask to form patterns including a passivation layer via hole and a partition groove and retain a part of the passivation layer which is in a region where a pixel electrode pattern is to be formed, removing a part of the photoresist which is in the region where the pixel electrode pattern is to be formed and retaining the other part of the photoresist used in the patterning process for patterning the passivation layer, then depositing a transparent conductive thin film, and forming the pixel electrode pattern through a lift-off process, wherein the passivation layer via hole is located above the drain electrode, the partition groove is formed at the periphery of the pixel electrode in the passivation layer, the pixel electrode is formed on the top of the passivation layer and connected with the drain electrode via the passivation layer via hole.

2. The method for manufacturing a TFT-LCD array substrate according to claim 1 , wherein the step 3 comprises:

step 31 of depositing the passivation layer on the substrate after step 2;

step 32 of applying a photoresist layer on the passivation layer;

step 33 of performing exposing and developing the photoresist layer with a half-tone mask or a gray-tone mask to form a photoresist fully remained region, a photoresist partially remained region, and a photoresist completely removed region, wherein the photoresist completely removed region corresponds to regions where the passivation layer via hole and the partition groove are formed, the photoresist partially remained region corresponds to a region where the pixel electrode is formed, and the photoresist fully remained region corresponds to remaining regions on the substrate;

step 34 of forming the passivation layer via hole and the partition groove by a dry etching and having the passivation layer and the gate insulating layer in the partition groove be subject to a lateral etching;

step 35 of removing the photoresist layer in the photoresist partially remained region by an ashing process, wherein the photoresist edge at the position of the partition groove forms a suspended undercut;

step 36 of depositing the transparent conductive thin film;

step 37 of removing the photoresist layer by a lift-off process and simultaneously removing the transparent conductive thin film over the photoresist layer so that the pixel electrode pattern is formed.

3. The method for manufacturing a TFT-LCD array substrate according to claim 2 , wherein the step 32 comprises:

applying the photoresist layer with a thickness of more than 2 μm over the passivation layer.

4. The method for manufacturing a TFT-LCD array substrate according to claim 2 , wherein the step 34 comprises:

through a dry etching in which chemical reactions dominate, etching the passivation layer at the position of the passivation layer via hole to form a passivation layer via hole over the drain electrode, etching the passivation layer and the gate insulating layer at the position of the partition groove of the pixel electrode periphery to form the partition groove and making the passivation layer and the gate insulating layer in the partition groove be subject to a lateral etching.

5. The method for manufacturing a TFT-LCD array substrate according to claim 1 , wherein the partition groove is a slit or comprises a plurality of through holes aligned in line.

6. The method for manufacturing a TFT-LCD array substrate according to claim 5 , wherein the width of the partition groove is about 1 μm˜about 30 μm.

7. The method for manufacturing a TFT-LCD array substrate according to claim 4 , wherein the dry etching in which chemical reactions dominate is performed under a RF power of about 1000 W˜about 5000 W and a pressure of about 0.0665 mbar˜about 0.399 mbar, in a reaction gas containing fluorine-based gas of about 10 vol. %˜about 50 vol. %.