IP Library Granted Patent US 8,560,993
Granted Patent B2
US 8,560,993 · App. 12/492,957 · Granted Oct 15, 2013

Semiconductor device and method of testing the same

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Quick Facts
Patent No.
US 8,560,993
App. No.
12/492,957
Granted
Oct 15, 2013
Kind
B2
Abstract

An object is to provide a semiconductor device in which it is possible to determine whether or not a minute delay time given by a delay circuit is within a specified value or not, and a method of testing the semiconductor device. In response to a data strobe signal TDQS for testing, the delay circuits DC 0 and DC 1 produce delay data strobe signals IDQS 0 and IDQS 1 delayed by delay times DT 0 and DT 1 . Outputted as a reverse signal from the inverter INV 0 , is a reverse data strobe signal RIDQS 0 in response to the delay data strobe signal IDQS 0 , and delayed by an allowable delay time IT. Inputted into the NAND gate ND 0 , are the reverse data strobe signal RIDQS 0 and the delay data strobe signal IDQS 1 . When, in comparison with the phase of the delay data strobe signal IDQS 0 , the phase of the delay data strobe signal IDQS 1 is delayed by the allowable delay time IT or more, a pulse signal PL 0 is not outputted from the NAND gate ND 0.

Claims (15)

1. A semiconductor device comprising:

a delay circuit configured to output an output signal to provide a delay time to an input signal,

a switch circuit configured to connect an output terminal and an input terminal of the delay circuit in response to a functioning test control signal to perform a functioning test, and

a dividing section configured to be connected to the output terminal of the delay circuit in response to the functioning test control signal, and to divide a cycle of the output signal of the delay circuit, wherein,

when the output terminal and the input terminal of the delay circuit are connected, the delay circuit operates as a ring oscillator.

2. The semiconductor device according to claim 1 , wherein:

the delay circuit comprises an even number of delay elements, and

the switch circuit connects the output terminal and the input terminal of the delay circuit via an inverter.

3. A method of testing a semiconductor device which includes a delay circuit configured to output an output signal to provide a delay time to an input signal, and which is subject to a functioning test in response to a functioning test control signal, the method comprising:

connecting an output terminal and an input terminal of the delay circuit in response to the functioning test control signal, so as to make the delay circuit operate as a ring oscillator; and

dividing a cycle of the output signal of the delay circuit which is operating as the ring oscillator.

4. A method of testing a semiconductor device which includes a delay circuit and a control circuit, the method comprising:

outputting a functioning test control signal to perform a functioning test, by the control circuit;

in response to the functioning test control signal, connecting an output terminal and an input terminal of the delay circuit to provide a delay time to an input signal, so as to make the delay circuit operate as a ring oscillator; and

in response to the functioning test control signal, supplying, to a dividing section, an output signal of the delay circuit so as to output a dividing signal obtained by dividing a cycle of the output signal.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2015
From: FUJITSU SEMICONDUCTOR LIMITED
To: SOCIONEXT INC.
Reel/Frame 035508/0469 →
CHANGE OF NAME Recorded Sep 27, 2010
From: FUJITSU MICROELECTRONICS LIMITED
To: FUJITSU SEMICONDUCTOR LIMITED
Reel/Frame 025046/0478 →
ASSIGNMENT OF ASSIGNOR'S RIGHT, TITLE AND INTEREST Recorded Mar 5, 2010
From: FUJITSU LIMITED
To: FUJITSU MICROELECTRONICS LIMITED
Reel/Frame 024035/0224 →