Printer with processor having bused decoding and expansion units

1. A printer comprising:

a processor, the processor comprising:

an address, data and control bus;

an expander unit and a decoder unit each coupled to the bus and configured respectively to decompress a bi-level black layer and a contone layer of a page to be printed; and

a halftoner/compositor unit which is coupled to the bus, and is configured to halftone the decompressed contone layer to form a bi-level cyan, yellow, magenta, and black (CYMK) layer and then composite the decompressed bi-level black layer over the bi-level CYMK layer to form a bi-level CYMK image of the page to be printed; and

a printhead interfaced to the processor, the printhead comprising a plurality of nozzles grouped in pods, the nozzles of a pod sharing a common ink reservoir.

2. A printer as claimed in claim 1 , further comprising an ink cartridge for supplying ink to the printhead, and a first integrated circuit (IC) containing print quality information.

3. A printer as claimed in claim 2 , further comprising a second IC interfaced to the processor, and wherein the processor is further configured to:

count a number of drops of ink printed by the printhead;

update a remaining drop count of the ink cartridge using the counted drops printed; and

write an updated remaining drop count to the second IC.

4. A printer as claimed in claim 3 , wherein the processor is configured to perform respective ink drop counts for a plurality of different ink types stored in the ink cartridge.

5. A printer as claimed in claim 3 , wherein the processor is configured to write the updated remaining drop count to the second IC each time a page is printed.

6. A printer as claimed in claim 3 , wherein the second IC and the processor are configured to authenticate the first IC and thereby the ink cartridge.