Method and system for energy efficient networking over a serial communication channel based on forward error correction support

1. A method for networking, the method comprising:

performing, by one or more circuits in an Ethernet physical layer device (PHY) that communicates over one or more serial communication channels:

prior to transitioning to an energy saving mode, receiving data with forward error correction (FEC) information of a first type, wherein a content of said first type of FEC information is based on a content of said data;

receiving physical layer signals over said one or more serial communication channels to maintain and/or refresh synchronization and/or training parameters in said Ethernet PHY while operating in said energy saving mode;

transitioning out of said energy saving mode upon receiving a wake sequence via said one or more serial communication channels, said wake sequence including FEC information of a second deterministic type, said second deterministic type of FEC information having a predetermined value and/or sequence of bits; and

processing said second deterministic type FEC information with a first part of FEC functionality in said Ethernet PHY that is enabled, while a second part of FEC functionality in said Ethernet PHY is disabled.

2. The method according to claim 1 , comprising configuring said one or more circuits based on an energy efficient networking control policy.

3. The method according to claim 1 , comprising disabling said second part of EFC functionality after receiving a sleep signal from a link partner that communicates with said Ethernet PHY.

4. The method according to claim 1 , wherein said energy saving mode comprises a low power idle mode.

5. The method according to claim 1 , comprising re-enabling said second part of FEC functionality after receiving said wake sequence.

6. The method according to claim 1 , wherein said one or more serial communication channels each comprise backplane, inter-chip traces, and/or copper cabling.

7. The method according to claim 1 , wherein said disabled second part of FEC is functionality comprise encoding and/or decoding functionality.

8. The method according to claim 1 , wherein said disabled second part of FEC functionality comprises one or both of scrambling and unscrambling functions.

9. The method according to claim 1 , wherein said Ethernet PHY is integrated on a line card.

10. A system for networking, the system comprising:

one or more circuits in an Ethernet physical layer device (PHY) that communicates over one or more serial communication channels, wherein said one or more circuits:

perform forward error correction (FEC) functions;

receive physical layer signals over said one or more serial communication channels to maintain and/or refresh synchronization and/or training parameters in said Ethernet PHY while operating in an energy saving mode;

transition out of said energy saving mode upon receiving a wake sequence via said one or more serial communication channels, said wake sequence including one or more deterministic FEC blocks, each of said one or more deterministic FEC blocks having a predetermined value and/or sequence of bits; and

process said one or more deterministic FEC blocks with a first part of FEC functionality in said Ethernet PHY that is enabled, while a second part of FEC functionality in said Ethernet PHY is disabled.

11. The system according to claim 10 , wherein said one or more circuits are configured based on an energy efficient networking control policy.

12. The system according to claim 10 , wherein said one or more circuits disable said second part of FEC functionality after receiving a sleep signal from a link partner that communicates with said Ethernet PHY.

13. The system according to claim 10 , wherein said energy saving mode comprises a low power idle mode.

14. The system according to claim 10 , wherein said one or more circuits re-enable said second part FEC functionality after receiving said wake sequence.

15. The system according to claim 10 , wherein said one or more serial communication channels each comprise backplane, inter-chip traces, and/or copper cabling.

16. The system according to claim 10 , wherein said disabled second part of FEC functionality comprise encoding and/or decoding functions.

17. The system according to claim 10 , wherein said disabled second part of FEC functionality comprise one or both of scrambling and unscrambling functions.

18. The system according to claim 10 , wherein said Ethernet PHY is integrated on a line card.

19. A method, comprising:

prior to transitioning of a physical layer device to an energy saving mode, receiving data with forward error correction (FEC) information of a first type, wherein a content of said first type of FEC information is based on a content of said data;

receiving refresh signals to maintain and/or refresh synchronization in said physical layer device while operating in said energy saving mode;

transitioning said physical layer device out of said energy saving mode upon receiving a wake sequence, said wake sequence including FEC information of a second deterministic type, said second deterministic type of FEC information having a predetermined value and/or sequence of bits; and

processing said second deterministic type of FEC information with a first part of FEC functionality in said physical layer device that is enabled, while a second part of FEC functionality in said physical layer is disabled.

20. The method according to claim 19 , further comprising disabling said second part of FEC functionality after receiving a sleep signal from a link partner that communicates with said physical layer device.

21. The method according to claim 19 , further comprising re-enabling said second part of FEC functionality after receiving said wake sequence.